Datasheet

Data Sheet AD7294
Rev. H | Page 5 of 48
SPECIFICATIONS
DAC SPECIFICATIONS
AV
DD
= DV
DD
= 4.5 V to 5.5 V, AGND = DGND = 0 V, internal 2.5 V reference; V
DRIVE
= 2.7 V to 5.5 V; T
A
=−40°C to +105°C, unless
otherwise noted. DAC OUTV+ AB and DAC OUTV+ CD = 4.5 V to 16.5 V, OFFSET IN x is floating, therefore, the DAC output
span = 0 V to 5 V.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
ACCURACY
Resolution 12 Bits
Relative Accuracy (INL) ±1 ±3 LSB
Differential Nonlinearity (DNL) ±0.3 ±1 LSB Guaranteed monotonic
Zero-Scale Error 2.5 8 mV
Full-Scale Error of DAC and
Output Amplifier
15.5
1
mV DAC OUTV+ = 5.0 V
Full-Scale Error of DAC 2 mV DAC OUTV+ = 15.0 V
Offset Error ±8.575 mV Measured in the linear region, T
A
= −40°C to +105°C
±2 mV Measured in the linear region, T
A
= 25°C
Offset Error Temperature
Coefficient
±5 ppm/°C
Gain Error ±0.025 ±0.155 % FSR
Gain Temperature Coefficient ±5 ppm/°C
DAC OUTPUT CHARACTERISTICS
Output Voltage Span 0 2 × V
REF
V 0 V to 5 V for a 2.5 V reference
Output Voltage Offset 0 10 V The output voltage span can be positioned in the 0 V to
15 V range; if the OFFSET IN x is left floating, the offset
pin = 2/3 × V
REF
, giving an output of 0 V to 2 × V
REF
Offset Input Pin Range 0 5 V
OUT
= 3 V
OFFSET
− 2 × V
REF
+ V
DAC
DC Input Impedance
2
75 kΩ 100 kΩ to V
REF
, and 200 kΩ to AGND, see Figure 48
Output Voltage Settling Time
2
8 µs 1/4 to 3/4 change within 1/2 LSB, measured from last
SCL edge
Slew Rate
2
1.1 V/µs
Short-Circuit Current
2
40 mA Full-scale current shorted to ground
Load Current
2
±10 mA Source and/or sink within 200 mV of supply
Capacitive Load Stability
2
10 nF R
L
= ∞
DC Output Impedance
2
1 Ω
REFERENCE
Reference Output Voltage 2.49 2.5 2.51 V ±0.4% maximum @ 25°C, AV
DD
= DV
DD
= 4.5 V to 5.5 V
Reference Input Voltage Range 0 AV
DD
− 2 V
Input Current 100 125 µA V
REF
= 2.5 V
Input Capacitance
2
20 pF
V
REF
Output Impedance
2
25 Ω
Reference Temperature
Coefficient
10 25 ppm/°C
1
This value indicates that the DAC output amplifiers can output voltages 15.5 mV below the DAC OUTV+ supply. If higher DAC OUTV+ supply voltages are used, the
full-scale error of the DAC is typically 2 mV with no load.
2
Samples are tested during initial release to ensure compliance; they are not subject to production testing.