Datasheet

Data Sheet AD7294
Rev. H | Page 33 of 48
T
SENSE
OFFSET REGISTERS (0x26 AND 0x27)
The AD7294 has temperature offset, 8-bit twos complement regis-
ters for both Remote Channel T
SENSE
1 and Remote Channel T
SENSE
2.
It allows the user to add or subtract an offset to the temperature.
The offset registers for T
SENSE
1 and T
SENSE
2 are 8-bit read/write
registers that store data in a twos complement format. This data
is subtracted from the temperature readings taken by T
SENSE
1
and T
SENSE
2 temperature sensors. The offset is implemented
before the values are stored in the T
SENSE
result register.
The offset registers can be used to compensate for transistors
with different ideality factors because the T
SENSE
results are
based on the 2N3906 transistor ideality factor. Different
transistors with different ideality factors result in different
offsets within the region of interest, which can be compensated
for by using this register.
Table 33. T
SENSE
Offset Data Format
Input
MSB
D7
D6 D5 D4 D3 D2 D1
LSB
D0
Value (°C)
−32 +16 +8 +4 +2 +1 +0.5 +0.25