Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Serial Port Interface (SPI)
- Register Structure
- Register Descriptions
- Vendor ID Register (Address 0x00)
- ADC Data Register (Address 0x01)
- ADC Sequence Register (Address 0x03)
- Configuration Register Bank (Address 0x05)
- Digital Output Driver Subregister (Address 0x01)
- Digital I/O Function Subregister (Address 0x02)
- General Subregister (Address 0x08)
- VIN RANGE0 and VIN RANGE1 Subregisters (Address 0x10 and Address 0x11)
- ADC Sampling Mode Subregister (Address 0x12)
- VIN ALERT0 Routing and VIN ALERT1 Routing Subregisters (Address 0x13 and Address 0x14)
- VIN Filter Subregister (Address 0x15)
- Conversion Delay Control Subregister (Address 0x16)
- Temperature Sensor Subregister (Address 0x20)
- Temperature Sensor Alert Routing Subregister (Address 0x21)
- GPIO2/DAC DISABLE0 and GPIO4/DAC DISABLE1 Subregisters (Address 0x30 and Address 0x31)
- Alert Limits Register Bank (Address 0x06)
- Alert Flags Register Bank (Address 0x07)
- Minimum and Maximum Register Bank (Address 0x08)
- Offset Register Bank (Address 0x09)
- DAC Buffer Enable Register (Address 0x0A)
- GPIO Register (Address 0x0B)
- Conversion Command Register (Address 0x0E)
- ADC Conversion Result Registers, VIN0 to VIN7 (Address 0x10 to Address 0x17)
- TSENSE Conversion Result Register (Address 0x20)
- DAC Channel Registers (Address 0x30 to Address 0x33)
- ADC Conversion Control
- DAC Output Control
- Alerts and Limits
- Outline Dimensions
AD7292 Data Sheet
Rev. 0 | Page 36 of 40
CS
SCLK
DIN
DOUT
BUSY
CONVERT
VIN0
CONVERT
VIN1
10660-048
VIN0 RESULT
[D15:D0]
VIN1 RESULT
[D15:D0]
POINT TO
ADC DATA
REGISTER
POINT TO
ADC DATA
REGISTER
ISSUE
CONVERSION
COMMAND
ISSUE
CONVERSION
COMMAND
POINT TO
ADC DATA
REGISTER
1168 1 16 24 328 116248
Figure 42. ADC Conversion Command (
CS
Line Taken High After Conversions)
CS
SCLK
DIN
DOUT
CONVERSION RESULT FOR VIN0
[D15:D0]
CONVERSION RESULT FOR VIN1
[D15:D0]
CONVERSION RESULT FOR VIN2
[D15:D0]
BUSY
CS
SCLK
DIN
DOUT
BUSY
CONVERT
VIN0
CONVERT
VIN2
CONVERT
VIN1
POINT TO ADC
SEQUENCE
REGISTER
POINT TO ADC
DATA
REGISTER
ISSUE CONVERSION
COMMAND
WRITE TO ADC
SEQUENCE REGISTER [D15:D0]
116
8
116
8
116
8
24 40 1 8
32
16
10660-049
Figure 43. Example of Using the ADC Sequencer
ADC SEQUENCER
The AD7292 provides an ADC sequencer, which enables the
selection of a preprogrammable sequence of channels for con-
version. Figure 43 shows the operation of the ADC sequencer.
To initiate a write to the ADC sequence register (Address 0x03),
point to it in the address pointer register with the write bit set
and the read bit cleared. The next two bytes specify the sequence
of channels that the ADC converts on (see Table 16). The ADC
data register (Address 0x01) is then pointed to and the conver-
sion command is issued. Note that the read bit is set when issuing
the conversion command.
When the ADC sequencer is used, ADC conversions are trig-
gered based on the contents of the ADC sequence register; the
address pointer reverts to its previous value—in this example,
the ADC data register—allowing the conversion results to be
read back.
After the first ADC conversion is complete, the first result is read
back, which requires 16 serial clocks. The first 10 bits contain
the ADC result, the next four bits are the channel identifier, and
the last two bits are alert bits (see Table 43). On the last falling
edge of the clock, the next ADC conversion begins.
The AD7292 continues converting on the channels specified by
the ADC sequence register. On completing the first sequence of
conversions, the sequencer loops back and begins the sequence
again until
CS
is taken high. The AD7292 is ready to accept a new
address pointer after
CS
is taken low. It is recommended that the
serial clock be kept low during the ADC conversions to ensure
that there is no disturbance of the results.