Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Serial Port Interface (SPI)
- Register Structure
- Register Descriptions
- Vendor ID Register (Address 0x00)
- ADC Data Register (Address 0x01)
- ADC Sequence Register (Address 0x03)
- Configuration Register Bank (Address 0x05)
- Digital Output Driver Subregister (Address 0x01)
- Digital I/O Function Subregister (Address 0x02)
- General Subregister (Address 0x08)
- VIN RANGE0 and VIN RANGE1 Subregisters (Address 0x10 and Address 0x11)
- ADC Sampling Mode Subregister (Address 0x12)
- VIN ALERT0 Routing and VIN ALERT1 Routing Subregisters (Address 0x13 and Address 0x14)
- VIN Filter Subregister (Address 0x15)
- Conversion Delay Control Subregister (Address 0x16)
- Temperature Sensor Subregister (Address 0x20)
- Temperature Sensor Alert Routing Subregister (Address 0x21)
- GPIO2/DAC DISABLE0 and GPIO4/DAC DISABLE1 Subregisters (Address 0x30 and Address 0x31)
- Alert Limits Register Bank (Address 0x06)
- Alert Flags Register Bank (Address 0x07)
- Minimum and Maximum Register Bank (Address 0x08)
- Offset Register Bank (Address 0x09)
- DAC Buffer Enable Register (Address 0x0A)
- GPIO Register (Address 0x0B)
- Conversion Command Register (Address 0x0E)
- ADC Conversion Result Registers, VIN0 to VIN7 (Address 0x10 to Address 0x17)
- TSENSE Conversion Result Register (Address 0x20)
- DAC Channel Registers (Address 0x30 to Address 0x33)
- ADC Conversion Control
- DAC Output Control
- Alerts and Limits
- Outline Dimensions

Data Sheet AD7292
Rev. 0 | Page 33 of 40
DAC BUFFER ENABLE REGISTER (ADDRESS 0x0A)
The 16-bit, read/write DAC buffer enable register enables the
DAC output buffers. Setting the appropriate bit to 1 enables the
corresponding DAC output buffer (see Table 41). On power-up,
the DAC buffer enable register contains all 0s by default.
GPIO REGISTER (ADDRESS 0x0B)
The 16-bit, read/write GPIO register is used to read or write data
to the GPIO pins, provided that the GPIO functionality is enabled
(see the Digital Output Driver Subregister (Address 0x01) section
and the Digital I/O Function Subregister (Address 0x02) section).
On power-up, the GPIO register contains all 0s by default.
Table 41. DAC Buffer Enable Register, Bit Function Descriptions
Bits Bit Name R/W Description
[D15:D4] Reserved R/W Reserved
D3 Enable DAC 3 R/W 0 = disable DAC 3 output buffer (default)
1 = enable DAC 3 output buffer
D2 Enable DAC 2 R/W 0 = disable DAC 2 output buffer (default)
1 = enable DAC 2 output buffer
D1 Enable DAC 1 R/W 0 = disable DAC 1 output buffer (default)
1 = enable DAC 1 output buffer
D0 Enable DAC 0 R/W 0 = disable DAC 0 output buffer (default)
1 = enable DAC 0 output buffer
Table 42. GPIO Register, Bit Function Descriptions
Bits Bit Name R/W Description
[D15:D12] Reserved R/W Reserved
D11 GPIO11 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D10 GPIO10 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D9 GPIO9 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D8 GPIO8 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D7 GPIO7 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D6 GPIO6 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D5 GPIO5 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D4 GPIO4 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D3
GPIO3
R/W
0 = low output for write; low input for read
1 = high output for write; high input for read
D2 GPIO2 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D1 GPIO1 R/W 0 = low output for write; low input for read
1 = high output for write; high input for read
D0
GPIO0
R/W
0 = low output for write; low input for read
1 = high output for write; high input for read