Datasheet

Data Sheet AD7292
Rev. 0 | Page 27 of 40
VIN Filter Subregister (Address 0x15)
The 16-bit VIN filter subregister enables digital filtering of the
analog inputs channels. The digital filter consists of a simple
low-pass filter function to help reduce unwanted noise on dc
signals. Writing a 1 to Bits[D7:D0] in this subregister enables
digital filtering of the corresponding analog input channel (see
Table 25). On power-up, the VIN filter subregister contains all
0s by default.
Conversion Delay Control Subregister (Address 0x16)
The 16-bit conversion delay control subregister is used to delay
the start (including the sample point) of a conversion. The delay
is a count of internal ADC clocks following the falling SCLK
signal that triggers the start of a conversion.
For example, if the conversion delay control subregister holds
the value 0x0003, three ADC clocks are counted before the
ADC enters hold mode and the conversion begins. The ADC
clock has a period of 40 ns typically.
If the conversion delay control subregister is set to a nonzero
value N, the ADC waits for the programmed number of ADC
clock periods (N) after a conversion is triggered before sampling
the input. If the register holds the default value of 0, there is no
delay, and the conversion is started from the falling SCLK that
triggers the start of the conversion. When using the conversion
delay, the conversion is extended by N + 1 clocks.
Table 25. VIN Filter Subregister, Bit Function Descriptions
Bits Bit Name R/W Description
[D15:D8] Reserved R/W Reserved
D7 Enable digital filtering
of VIN7
R/W 0 = disable digital filtering of VIN7
1 = enable digital filtering of VIN7
D6 Enable digital filtering
of VIN6
R/W 0 = disable digital filtering of VIN6
1 = enable digital filtering of VIN6
D5 Enable digital filtering
of VIN5
R/W 0 = disable digital filtering of VIN5
1 = enable digital filtering of VIN5
D4
Enable digital filtering
of VIN4
R/W
0 = disable digital filtering of VIN4
1 = enable digital filtering of VIN4
D3 Enable digital filtering
of VIN3
R/W 0 = disable digital filtering of VIN3
1 = enable digital filtering of VIN3
D2 Enable digital filtering
of VIN2
R/W 0 = disable digital filtering of VIN2
1 = enable digital filtering of VIN2
D1 Enable digital filtering
of VIN1
R/W 0 = disable digital filtering of VIN1
1 = enable digital filtering of VIN1
D0 Enable digital filtering
of VIN0
R/W 0 = disable digital filtering of VIN0
1 = enable digital filtering of VIN0
Table 26. Conversion Delay Control Subregister, Bit Function Descriptions
Bits Bit Name R/W Description
[D15:D0] Delay value R/W These bits specify the 16-bit delay value (0 to 0xFFFF) before the start of a conversion.
The delay is a count of internal ADC clocks following the falling SCLK signal.