Datasheet

AD7292 Data Sheet
Rev. 0 | Page 2 of 40
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
ADC Specifications ...................................................................... 3
DAC Specifications....................................................................... 4
General Specifications ................................................................. 5
Temperature Sensor Specifications ............................................ 5
Timing Specifications .................................................................. 6
Absolute Maximum Ratings ............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 15
Analog Inputs .............................................................................. 15
ADC Transfer Functions ........................................................... 16
Temperature Sensor ................................................................... 17
DAC Operation ........................................................................... 17
Digital I/O Pins ........................................................................... 17
Serial Port Interface (SPI) .............................................................. 18
Interface Protocol ....................................................................... 18
Register Structure ........................................................................... 20
Register Descriptions ..................................................................... 21
Vendor ID Register (Address 0x00) ......................................... 21
ADC Data Register (Address 0x01) ......................................... 21
ADC Sequence Register (Address 0x03) ................................. 21
Configuration Register Bank (Address 0x05) .......................... 21
Alert Limits Register Bank (Address 0x06) ............................ 30
Alert Flags Register Bank (Address 0x07) .............................. 31
Minimum and Maximum Register Bank (Address 0x08) .... 32
Offset Register Bank (Address 0x09) ....................................... 32
DAC Buffer Enable Register (Address 0x0A) ......................... 33
GPIO Register (Address 0x0B) ................................................. 33
Conversion Command Register (Address 0x0E) ................... 34
ADC Conversion Result Registers, VIN0 to VIN7
(Address 0x10 to Address 0x17) ............................................... 34
T
SENSE
Conversion Result Register (Address 0x20) ................ 34
DAC Channel Registers (Address 0x30 to Address 0x33) .... 34
ADC Conversion Control ............................................................. 35
ADC Conversion Command .................................................... 35
ADC Sequencer .......................................................................... 36
DAC Output Control ..................................................................... 37
LDAC Operation ........................................................................ 37
Simultaneous Update of All DAC Outputs ............................. 37
Alerts and Limits ............................................................................ 38
Alert Limit Monitoring Features .............................................. 38
Hardware Alert Pins................................................................... 38
Alert Flag Bits in the Conversion Result Registers ................ 38
Alert Flags Register Bank .......................................................... 39
Minimum and Maximum Conversion Results ...................... 39
Outline Dimensions ....................................................................... 40
Ordering Guide .......................................................................... 40
REVISION HISTORY
10/12—Revision 0: Initial Version