Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Serial Port Interface (SPI)
- Register Structure
- Register Descriptions
- Vendor ID Register (Address 0x00)
- ADC Data Register (Address 0x01)
- ADC Sequence Register (Address 0x03)
- Configuration Register Bank (Address 0x05)
- Digital Output Driver Subregister (Address 0x01)
- Digital I/O Function Subregister (Address 0x02)
- General Subregister (Address 0x08)
- VIN RANGE0 and VIN RANGE1 Subregisters (Address 0x10 and Address 0x11)
- ADC Sampling Mode Subregister (Address 0x12)
- VIN ALERT0 Routing and VIN ALERT1 Routing Subregisters (Address 0x13 and Address 0x14)
- VIN Filter Subregister (Address 0x15)
- Conversion Delay Control Subregister (Address 0x16)
- Temperature Sensor Subregister (Address 0x20)
- Temperature Sensor Alert Routing Subregister (Address 0x21)
- GPIO2/DAC DISABLE0 and GPIO4/DAC DISABLE1 Subregisters (Address 0x30 and Address 0x31)
- Alert Limits Register Bank (Address 0x06)
- Alert Flags Register Bank (Address 0x07)
- Minimum and Maximum Register Bank (Address 0x08)
- Offset Register Bank (Address 0x09)
- DAC Buffer Enable Register (Address 0x0A)
- GPIO Register (Address 0x0B)
- Conversion Command Register (Address 0x0E)
- ADC Conversion Result Registers, VIN0 to VIN7 (Address 0x10 to Address 0x17)
- TSENSE Conversion Result Register (Address 0x20)
- DAC Channel Registers (Address 0x30 to Address 0x33)
- ADC Conversion Control
- DAC Output Control
- Alerts and Limits
- Outline Dimensions

Data Sheet AD7292
Rev. 0 | Page 11 of 40
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
1.0
–40 –20 0 20 40 60 80 100 120
INL ERROR (LSB)
TEMPERATURE (°C)
AV
DD
= 5V
DV
DD
= 3V
V
DRIVE
= 3V
f
SAMPLE
= 225kSPS
INTERNAL REFERENCE
SINGLE-ENDED MODE
0V TO V
REF
, –INL
0V TO V
REF
, +INL
0V TO 2 × V
REF
, –INL
0V TO 2 × V
REF
, +INL
0V TO 4 × V
REF
, –INL
0V TO 4 × V
REF
, +INL
(AV
DD
– 4 × V
REF
) TO AV
DD
, –INL
(AV
DD
– 4 × V
REF
) TO AV
DD
, +INL
10660-010
Figure 10. ADC INL vs. Temperature
–3
–2
–1
0
1
2
3
–40 –20 0 20 40 60 80 100 120
OFFSET ERROR (LSB)
TEMPERATURE (°C)
0V TO 4 × V
REF
0V TO V
REF
0V TO 2 × V
REF
(AV
DD
– 4 × V
REF
) TO AV
DD
AV
DD
= 5.25V
DV
DD
= 5V
V
DRIVE
= 3.3V
f
SAMPLE
= 200kSPS
INTERNAL REFERENCE
10660-012
Figure 11. Offset Error vs. Temperature, Single-Ended
and Differential Modes
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
10
100
90
80
70
60
50
40
30
20
THD (dB)
INPUT FREQUENCY (kHz)
AV
DD
= 5V
DV
DD
= 3V
V
DRIVE
= 3V
f
SAMPLE
= 225kSPS
T
A
= 25°C
INTERNAL REFERENCE
AV
DD
– 4 × V
REF,
0Ω
AV
DD
– 4 × V
REF,
220Ω
AV
DD
– 4 × V
REF,
510Ω
0V TO 4 × V
REF,
0Ω
0V TO 4 × V
REF,
220Ω
0V TO 4 × V
REF,
430Ω
0V TO 4 × V
REF,
510Ω
0V TO V
REF,
0Ω
0V TO V
REF,
220Ω
0V TO V
REF,
510Ω
0V TO 2 × V
REF,
0Ω
0V TO 2 × V
REF,
220Ω
0V TO 2 × V
REF,
510Ω
10660-014
Figure 12. THD vs. Input Frequency for Various Source Impedances,
Single-Ended Mode
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
–40 –20 0 20 40 60 80 100 120
DNL ERROR (LSB)
TEMPERATURE (°C)
AV
DD
= 5V
DV
DD
= 3V
V
DRIVE
= 3V
f
SAMPLE
= 225kSPS
INTERNAL REFERENCE
SINGLE-ENDED MODE
0V TO V
REF
, –DNL
0V TO V
REF
, +DNL
0V TO 2 × V
REF
, –DNL
0V TO 2 × V
REF
, +DNL
0V TO 4 × V
REF
, –DNL
0V TO 4 × V
REF
, +DNL
(AV
DD
– 4 × V
REF
) TO AV
DD
, –DNL
(AV
DD
– 4 × V
REF
) TO AV
DD
, +DNL
10660-011
Figure 13. ADC DNL vs. Temperature
–5
–4
–3
–2
–1
0
1
2
3
4
5
–40 –20 0 20 40 60 80 100 120
GAIN ERROR (LSB)
TEMPERATURE (°C)
0V TO 4 × V
REF
0V TO 2 × V
REF
(AV
DD
– 4 × V
REF
) TO AV
DD
0V TO V
REF
AV
DD
= 5.25V
DV
DD
= 5V
V
DRIVE
= 3.3V
f
SAMPLE
= 200kSPS
INTERNAL REFERENCE
10660-013
Figure 14. ADC Gain Error vs. Temperature, Single-Ended
and Differential Modes
20
25
30
35
40
45
50
55
60
65
70
75
80
85
90
95
100
105
110
115
120
100 1k 10k 100k 1M 10M 100M
CHANNEL-TO-CHANNEL ISOLATION (dB)
INPUT FREQUENCY (Hz)
AV
DD
= 5V
DV
DD
= 3V
V
DRIVE
= 3V
f
SAMPLE
= 250kSPS
f
IN
= 10kHz
INTERNAL REFERENCE
FULL-SCALE SIGNAL ON CHANNEL,
VIN0 TO VIN3 AND VIN5 TO VIN7
INPUT FREQUENCY RAMPED MEASUREMENTS ON VIN4
T
A
= 25°C
0V TO V
REF
0V TO 2 × V
REF
0V TO 4 × V
REF
(AV
DD
– 4 × V
REF
) TO AV
DD
10660-016
Figure 15. ADC Channel-to-Channel Isolation