Datasheet

AD7291 Data Sheet
Rev. B | Page 14 of 28
Temperature Value Format
V
DRIVE
One LSB of the ADC corresponds to 0.25°C. The temperature
reading from the ADC is stored in a 12-bit twos complement
format, to accommodate both positive and negative tempera-
ture measurements. Sample temperature values are listed in
Table 7. The temperature conversion formulas are as follows:
V
DRIVE
controls the voltage at which the serial interface operates.
V
DRIVE
allows the ADC to easily interface to both 1.8 V and 3 V
processors. For example, if the AD7291 is operated with a V
DD
of 3.3 V, the V
DRIVE
pin can be powered from a 1.8 V supply.
This enables the AD7291 to operate with a larger dynamic
range with a V
DD
of 3.3 V while still being able to interface to
1.8 V processors. Take care to ensure that V
DRIVE
does not
exceed V
DD
by more than 0.3 V (see the Absolute Maximum
Ratings section).
Positive Temperature = ADC Code/4
Negative Temperature = (4096 − ADC Code)/4
The previous formulae are for a V
REF
of 2.5 V only. If an
external reference is used, the temperature sensor requires an
external reference of between 2 V and 2.5 V for correct
operation. The temperature results (in Celsius) are calculated
using the following formula, where V
EXT_REF
is the value of the
external reference voltage.
THE INTERNAL OR EXTERNAL REFERENCE
The AD7291 can operate with either the internal 2.5 V on-chip
reference or an externally applied reference. The EXT_REF bit
in the command register is used to determine whether the
internal reference is used. If the EXT_REF bit is selected in the
command register, an external reference can be supplied
through the V
REF
pin. On power-up, the internal reference is
enabled. Suitable external reference sources for the AD7291
include AD780, AD1582, ADR431, REF193, and ADR391.
15.2733.109
10
_
+=
ADCCode
VeTemperatur
REFEXT
Table 7. Temperature Data Format
Temperature (°C) Digital Output
The internal reference circuitry consists of a 2.5 V band gap
reference and a reference buffer. When the AD7291 operates in
internal reference mode, the 2.5 V internal reference is available
at the V
REF
pin, which should be decoupled to GND1 using a
10 F capacitor. It is recommended that the internal reference
be buffered before applying it elsewhere in the system.
−40 1111 0110 0000
−25 1111 1001 1100
−10 1111 1101 1000
−0.25 1111 1111 1111
0 0000 0000 0000
+0.25 0000 0000 0001
+10 0000 0010 1000
The internal reference is capable of sourcing up to 2 mA of
current when the converter is static. The reference buffer
requires 5.5 ms to power up and charge the 10 F decoupling
capacitor during the power-up time.
+25 0000 0110 0100
+50 0000 1100 1000
+75 0001 0010 1100
+100 0001 1001 0000
RESET
+105 0001 1010 0100
The AD7291 includes a reset feature, which can be used to reset
the device and the content of all internal registers including the
command register to their default state. To activate the reset
operation, the
PD
/
RST
pin should be brought low for a
minimum of 1 ns and a maximum of 100 ns and be asynchronous
to the clock; therefore, it can be triggered at any time. If the
PD
/
RST
pin is held low for greater than 100 ns, the part enters full
power-down mode. It is imperative that the
PD
/
RST
pin be held
at a stable logic level at all times to ensure normal operation.
+125 0001 1111 0100