Datasheet

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8-Channel, I

C, 12-Bit SAR ADC

with Temperature Sensor

Data Sheet

AD7291

Rev. B

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FEATURES

12-bit SAR ADC

8 single-ended analog input channels

Analog input range: 0 V to 2.5 V

12-bit temperature-to-digital converter

Temperature sensor accuracy of ±1°C typical

Channel sequencer operation

Specified for V

of 2.8 V to 3.6 V

Logic voltage V

DRIVE

= 1.65 V to 3.6 V

Internal 2.5 V reference

C-compatible serial interface supports standard and

fast speed modes

Out of range indicator/alert function

Autocycle mode

Power-down current: 12 μA maximum

Temperature range: −40°C to +125°C

20-lead LFCSP package

FUNCTIONAL BLOCK DIAGRAM

TEMP

SENSOR

12-BIT

SUCCESSIVE

APPROXIMATION

ADC

INPUT

MUX

T/H

GND

PD/RST

SCL

SDA

AS1

AS0

DRIVE

IN7

IN0

CONTROL LOGIC

C INTERFACE

SEQUENCER

REF

BUFREF

AD7291

08711-001

ALERT

Figure 1.

GENERAL DESCRIPTION

The AD7291 is a 12-bit, low power, 8-channel, successive

approximation analog-to-digital converter (ADC) with an

internal temperature sensor.

The part operates from a single 3.3 V power supply and features

an I

C-compatible interface. The part contains a 9-channel

multiplexer and a track-and-hold amplifier than can handle

frequencies up to 30 MHz. The device has an on-chip 2.5 V

reference that can be disabled to allow the use of an external

reference.

The AD7291 provides a 2-wire serial interface compatible with

C interfaces. The I

C interface supports standard and fast I

interface modes. The AD7291 normally remains in a partial

power-down state while not converting and powers up for

conversions. The conversion process can be controlled by a

command mode where conversions occur across I

C write

operations or an autocycle mode selected through software

control.

The AD7291 includes a high accuracy band gap temperature

sensor, which is monitored and digitized by the 12-bit ADC to

give a resolution of 0.25°C.

The AD7291 offers a programmable sequencer, which enables

the selection of a preprogrammable sequence of channels for

conversion.

On-chip limit registers can be programmed with high and low

limits for the conversion results; an out-of-range indicator

output (ALERT) becomes active when the programmed high

or low limits are violated by the conversion result. This output

can be used as an interrupt.

PRODUCT HIGHLIGHTS

1. Ideally suited to monitoring system variables in a variety

of systems including telecommunications, process control,

and industrial control.

2. I

C-compatible serial interface, which supports standard

and fast modes.

3. Automatic partial power-down while not converting to

maximize power efficiency.

4. Channel sequencer operation.

5. Integrated temperature sensor with 0.25°C resolution.

6. Out of range indicator that can be software disabled or

enabled.

Table 1. AD7291 and Related Products

Device Resolution Interface Features

AD7291

12-bit I

C 8-channel, I

C, 12-bit SAR

ADC with temperature sensor

AD7298 12-bit SPI 8-channel, 1 MSPS, 12-bit SAR

ADC with temperature sensor

Summary of content (29 pages)

PAGE 1
FEATURES FUNCTIONAL BLOCK DIAGRAM 12-bit SAR ADC 8 single-ended analog input channels Analog input range: 0 V to 2.5 V 12-bit temperature-to-digital converter Temperature sensor accuracy of ±1°C typical Channel sequencer operation Specified for VDD of 2.8 V to 3.6 V Logic voltage VDRIVE = 1.65 V to 3.6 V Internal 2.
PAGE 2
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PAGE 3
AD7291 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Address Pointer Register ........................................................... 15 Functional Block Diagram .............................................................. 1 Command Register (0x00)........................................................ 17 General Description .........................................................................
PAGE 4
Data Sheet AD7291 SPECIFICATIONS VDD = 2.8 V to 3.6 V; VDRIVE = 1.65 V to 3.6 V; fSCL = 400 kHz, fast SCLK mode; VREF = 2.5 V internal/external; TA = −40°C to +125°C, unless otherwise noted. Table 2.
PAGE 5
AD7291 Parameter LOGIC OUTPUTS Output High Voltage, VOH Data Sheet Min Typ VDRIVE − 0.3 VDRIVE − 0.
PAGE 6
Data Sheet AD7291 I2C TIMING SPECIFICATIONS Guaranteed by initial characterization. All values were measured with the input filtering enabled. CB refers to the capacitive load on the bus line, with tR and tF measured between 0.3 × VDRIVE and 0.7 × VDRIVE (see Figure 2). VDD = 2.8 V to 3.6 V; VDRIVE = 1.65 V to 3.6 V; VREF = 2.5 V internal/external; TA = −40°C to +125°C, unless otherwise noted. Table 3.
PAGE 7
AD7291 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 4. Parameter VDD to GND1, GND VDRIVE to GND1, GND Analog Input Voltage to GND1 Digital Input Voltage to GND1 Digital Output Voltage to GND1 VREF to GND1 GND to GND1 Input Current to Any Pin Except Supplies 1 Operating Temperature Range Storage Temperature Range Junction Temperature Pb-free Temperature, Soldering Reflow ESD 1 Rating −0.3 V to +5 V −0.3 V to +5 V −0.3 V to +3 V −0.3 V to VDRIVE + 0.3 V −0.3 V to VDRIVE + 0.3 V −0.3 V to +3 V −0.3 V to +0.
PAGE 8
Data Sheet AD7291 16 VDRIVE 17 PD/RST 19 VIN1 18 VIN0 20 VIN2 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 15 SCL VIN3 1 VIN4 2 14 SDA AD7291 VIN5 3 13 AS1 TOP VIEW (Not to Scale) VIN6 4 12 ALERT 11 AS0 NOTES 1. THE EXPOSED METAL PADDLE ON THE BOTTOM OF THE LFCSP PACKAGE SHOULD BE SOLDERED TO PCB GROUND FOR PROPER HEAT DISSIPATION AND PERFORMANCE. 08711-003 VDD 10 GND 9 DCAP 8 VREF 7 GND1 6 VIN7 5 Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No.
PAGE 9
AD7291 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0 VDD = VDRIVE = 3V fS = 22.22ksps fSCL = 400kHz fIN = 10kHz SNR = 71.209 THD = –81.66 –40 0.8 0.6 0.4 INL (LSB) AMPLITUDE (dB) –20 –60 –80 TA = 25°C VDRIVE = 3V VDD = 3V fS = 22.22ksps fSCL = 400kHz 0.2 0 –0.2 –0.4 –0.6 –100 2k 4k 6k 8k 10k –1.0 FREQUENCY (Hz) 0 0.5 1.0 Figure 4. Typical FFT 1.0 0.6 0.6 0.4 DNL (LSB) 0 –0.2 0 –0.2 –0.4 –0.6 –0.6 –0.8 –0.8 –1.
PAGE 10
Data Sheet AD7291 125 CHANNEL-TO-CHANNEL ISOLATION (dB) VDD = VDRIVE = 3V 2.5 VREF (V) 2.0 1.5 1.0 0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 CURRENT LOAD (mA) 115 110 105 100 95 90 85 80 75 08711-021 0 VDD = VDRIVE = 3V fSCL = 400kHz 120 1 100 1k fNOISE (kHz) Figure 10. VREF vs. Reference Output Drive Figure 13. Channel-to-Channel Isolation, fIN = 10 kHz 55 72 VDRIVE = 3V VDD = 3V 50 45 71 SINAD (dB) TEMPERATURE READING (°C) 10 08711-018 3.
PAGE 11
AD7291 Data Sheet 2.5 9.0 VDRIVE = 3V VDRIVE = 3V VDD = 3V 8.9 2.0 TOTAL CURRENT (µA) 8.8 8.6 8.5 8.4 8.3 8.2 –40°C +25°C +85°C +125°C 1.5 1.0 0.5 8.0 0 60 120 180 240 300 SCL FREQUENCY (kHz) 360 420 0 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 VDD Figure 16. Power vs. Throughput in Normal Mode Figure 17. Full Shutdown Current vs. Supply Voltage for Various Temperatures Rev. B | Page 10 of 28 08711-037 8.1 08711-062 POWER (mW) 8.
PAGE 12
Data Sheet AD7291 TERMINOLOGY Signal-to-Noise and Distortion Ratio (SINAD) The measured ratio of signal-to-noise and distortion at the output of the ADC. The signal is the rms amplitude of the fundamental. Noise is the sum of all nonfundamental signals up to half the sampling frequency (fS/2), excluding dc. The ratio is dependent on the number of quantization levels in the digitization process; the more levels, the smaller the quantization noise.
PAGE 13
AD7291 Data Sheet CIRCUIT INFORMATION In command mode at the beginning of a read, the AD7291 wakes up completely, that is, becomes fully functional and completes the conversion while the address is being read out. In autocylce mode, conversions occur at 50 μs intervals; that is, the AD7291 exits partial power-down mode and powers up fully at 50 μs intervals. This automatic partial power-down feature allows power saving between conversions.
PAGE 14
Data Sheet AD7291 Each input integrates, in turn, over a period of several hundred microseconds. This takes place continuously in the background, leaving the user free to perform conversions on the other channels. When integration is complete, a signal passes to the control logic to initiate a conversion automatically. ADC TRANSFER FUNCTION The output coding of the AD7291 is straight binary for the analog input channel conversion results and twos complement for the temperature conversion result.
PAGE 15
AD7291 Data Sheet Temperature Value Format VDRIVE One LSB of the ADC corresponds to 0.25°C. The temperature reading from the ADC is stored in a 12-bit twos complement format, to accommodate both positive and negative temperature measurements. Sample temperature values are listed in Table 7. The temperature conversion formulas are as follows: VDRIVE controls the voltage at which the serial interface operates. VDRIVE allows the ADC to easily interface to both 1.8 V and 3 V processors.
PAGE 16
Data Sheet AD7291 INTERNAL REGISTER STRUCTURE The AD7291 contains 34 internal registers (see Figure 23) that are used to store conversion results, high and low conversion limits, and information to configure and control the device. There are 33 data registers and one address pointer register. COMMAND REGISTER VOLTAGE CONV RESULT REGISTER TSENSE CONV RESULT REGISTER Each data register has an address that the address pointer register points to when communicating with it.
PAGE 17
AD7291 Data Sheet Table 9.
PAGE 18
Data Sheet AD7291 COMMAND REGISTER (0x00) The command register is a 16-bit write-only register that is used to set the operating modes of the AD7291. The bit functions are outlined in Table 10. A two-byte write is necessary when writing to the command register. MSB denotes the first bit in the data stream. During power-up, the default content of the command register is all 0s. Table 10.
PAGE 19
AD7291 Data Sheet Table 12.
PAGE 20
Data Sheet AD7291 DATAHIGH Register Table 17. TSENSE Conversion Result Register (First Read) MSB D15 ADD3 D14 ADD2 D13 ADD1 D12 ADD0 D11 B11 D10 B10 D9 B9 D8 B8 Table 18. TSENSE Result Register (Second Read) D7 B7 D6 B6 D5 B5 D4 B4 D3 B3 D2 B2 LSB D0 B0 D1 B1 TSENSE AVERAGE RESULT REGISTER (0x03) The TSENSE average result register is a 16-bit read-only register used to store the average result from the internal temperature sensor.
PAGE 21
AD7291 Data Sheet HYSTERESIS REGISTER Each analog input channel and the internal temperature sensor has its own hysteresis register, which is a 16-bit read/write register. Only the 12 LSBs are used. Bit D15 to Bit D12 are not used in the register and are set to 0s. The hysteresis register stores the hysteresis value, N, when using the limit registers. Each pair of limit registers has a dedicated hysteresis register.
PAGE 22
Data Sheet AD7291 I2C INTERFACE Control of the AD7291 is carried out via the I2C compatible serial bus. The AD7291 is connected to this bus as a slave device under the control of a master device such as the processor. the serial clock line (SCL) remains high. This indicates that a data stream follows. The master device is responsible for generating the clock.
PAGE 23
AD7291 Data Sheet WRITING TO THE AD7291 WRITING TWO BYTES OF DATA TO A 16-BIT REGISTER WRITING TO MULTIPLE REGISTERS Writing to multiple address registers consists of the following steps (see Figure 26): All registers on the AD7921 are 16-bit registers; therefore, two bytes of data are required to write a value to any one of these registers. Writing two bytes of data to a register consists of the following sequence (see Figure 25): 5. 6. 7. 8. 9. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16.
PAGE 24
Data Sheet AD7291 READING DATA FROM THE AD7291 READING TWO BYTES OF DATA FROM A 16-BIT REGISTER Reading two bytes of data from a 16-bit register consists of the following sequence (see Figure 27): Reading the contents from any of the 16-bit registers is a 2-byte read operation. In this protocol, the first part of the transaction writes to the register pointer.
PAGE 25
AD7291 Data Sheet MODES OF OPERATION When supplies are first applied to the AD7291, the ADC powers up in partial power-down mode and normally remains in this partial power-down state while not converting. Once the master addresses the AD7291, it exits partial power-down. There are two methods of initiating a conversion on the AD7291: command mode and autocycle mode. COMMAND MODE In command mode, the AD7291 converts on demand on either a single channel or a sequence of channels.
PAGE 26
Data Sheet AD7291 15. The master then asserts an acknowledge on SDA. 16. The master receives the second data byte, which contains the eight LSBs of the converted result for Channel VIN0. The master then asserts on acknowledge on SDA. 17. Step 11 and Step 12 repeat for Channel VIN1 and Channel VIN2. 18. Once the master has received the results from all the selected channels, the slave again converts and outputs the result for the first channel in the selected sequence. Step 12 to Step 14 are repeated. 19.
PAGE 27
AD7291 Data Sheet AUTOCYCLE MODE The AD7291 can be configured to convert continuously on a programmable sequence of channels, making it the ideal mode of operation for system monitoring. This mode is useful for monitoring signals, such as battery voltage and temperature, alerting only when the limits are violated. Conversions take place in the background approximately every 50 μs, and are transparent to the master. The acquisition and conversion times combined for any channel take approximately 3.6 μs.
PAGE 28
Data Sheet AD7291 OUTLINE DIMENSIONS 0.30 0.25 0.18 0.50 BSC PIN 1 INDICATOR 20 16 15 1 EXPOSED PAD 2.75 2.60 SQ 2.35 11 TOP VIEW 0.80 0.75 0.70 0.50 0.40 0.30 5 10 0.25 MIN BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF SEATING PLANE 6 FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WGGD. 020509-B PIN 1 INDICATOR 4.10 4.00 SQ 3.90 Figure 29.
PAGE 29
AD7291 Data Sheet NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08711-0-10/11(B) Rev.