Datasheet

Data Sheet AD7291
Rev. C | Page 5 of 28
I
2
C TIMING SPECIFICATIONS
Guaranteed by initial characterization. All values were measured with the input filtering enabled. C
B
refers to the capacitive load on the
bus line, with t
R
and t
F
measured between 0.3 × V
DRIVE
and 0.7 × V
DRIVE
(see Figure 2). V
DD
= 2.8 V to 3.6 V; V
DRIVE
= 1.65 V to 3.6 V; V
REF
=
2.5 V internal/external; T
A
= −40°C to +125°C, unless otherwise noted.
Table 3.
Limit at T
MIN
, T
MAX
Parameter Conditions Min Typ Max Unit Description
f
SCL
Standard mode 100 kHz Serial clock frequency
Fast mode 400 kHz
t
1
Standard mode 4 µs t
HIGH
, SCL high time
Fast mode 0.6 µs
t
2
Standard mode 4.7 µs t
LOW
, SCL low time
Fast mode 1.3 µs
t
3
Standard mode 250 ns t
SU ;DAT
, data setup time
Fast mode
100
ns
t
4
1
Standard mode 0 3.45 µs t
HD ;DAT
, data hold time
Fast mode 0 0.9 µs
t
5
Standard mode 4.7 µs t
SU;STA
, setup time for a repeated start condition
Fast mode 0.6 µs
t
6
Standard mode 4 µs t
HD;STA
, hold time for a repeated start condition
Fast mode 0.6 µs
t
7
Standard mode 4.7 µs t
BUF
, bus-free time between a stop and a start condition
Fast mode 1.3 µs
t
8
Standard mode 4 µs t
SU;STO
, setup time for a stop condition
Fast mode 0.6 µs
t
9
Standard mode 1000 ns t
RDA
, rise time of the SDA signal
Fast mode 20 + 0.1 C
B
300 ns
t
10
Standard mode 300 ns t
FDA
, fall time of the SDA signal
Fast mode 20 + 0.1 C
B
300 ns
t
11
Standard mode 1000 ns t
RCL
, rise time of the SCL signal
Fast mode 20 + 0.1 C
B
300 ns
t
11A
Standard mode
1000
ns
t
RCL1
, rise time of the SCL signal after a repeated
Fast mode 20 + 0.1 C
B
300 ns start condition and after an acknowledge bit
t
12
Standard mode 300 ns t
FCL
, fall time of the SCL signal
Fast mode 20 + 0.1 C
B
300 ns
t
SP
Fast mode 0 50 ns Pulse width of the suppressed spike
t
POWER-UP
6 ms Power-up and acquisition time
1
A device must provide a data hold time for SDA to bridge the undefined region of the SCL falling edge.
t
6
t
7
t
2
t
11
t
4
t
1
t
12
t
10
t
5
t
9
t
6
t
3
t
8
08711-002
SCL
S
SDA
S = START CONDITION
P = STOP CONDITION
P PS
Figure 2. 2-Wire Serial Interface Timing Diagram