Datasheet

Data Sheet AD7291
Rev. C | Page 19 of 28
Table 17. T
SENSE
Conversion Result Register (First Read)
MSB
D15 D14 D13 D12 D11 D10 D9 D8
ADD3 ADD2 ADD1 ADD0 B11 B10 B9 B8
Table 18. T
SENSE
Result Register (Second Read)
LSB
D7 D6 D5 D4 D3 D2 D1 D0
B7 B6 B5 B4 B3 B2 B1 B0
TSENSE AVERAGE RESULT REGISTER (0X03)
The T
SENSE
average result register is a 16-bit read-only register
used to store the average result from the internal temperature
sensor. This register stores the average temperature readings
from the ADC in an 11-bit twos complement format, D11 to
D0, and uses Bit D15 to Bit D12 to store the channel address
bits. The T
SENSE
average result register is updated after every
T
SENSE
conversion is completed. The first T
SENSE
average
conversion result given by the AD7291 after averaging is
enabled is the actual first T
SENSE
conversion result. Table 13
details the temperature data format, which applies to the
internal temperature sensor. See the Temperature Sensor
Averaging section for more details.
Table 19. T
SENSE
Average Result Register (First Read)
MSB
D15
D14
D13
D12
D11
D10
D9
D8
ADD3 ADD2 ADD1 ADD0 B11 B10 B9 B8
Table 20. T
SENSE
Average Result Register (Second Read)
LSB
D7 D6 D5 D4 D3 D2 D1 D0
B7 B6 B5 B4 B3 B2 B1 B0
LIMIT REGISTERS (0X04 TO 0X1E)
The AD7291 has nine pairs of limit registers. Each pair stores
high and low conversion limits for each analog input channel
and the internal temperature sensor. Each pair of limit registers
has one associated hysteresis register. All 27 registers are 16 bits
wide; only the 12 LSBs of the registers are used for the AD7291.
The four MSBs, D15 and D12, in these registers must contain
0s. During power-up, the contents of the DATA
HIGH
register for
each analog voltage channel is full scale (0x0FFF), while the
default contents of the DATA
LOW
voltage channels registers is
zero scale (0x0000). The output coding of the AD7291 is twos
complement for the temperature conversion result. The default
content for the T
SENSE
DATA
HIGH
register is 0x07FF, while the
default content of the T
SENSE
DATA
LOW
register is 0x0800. The
AD7291 signals an alert in hardware if the conversion result
moves outside the upper or lower limit set by the limit registers.
DATA
HIGH
Register
The DATA
HIGH
registers for CH0 to CH7 and the internal
temperature sensor are 16-bit read/write registers; only the
12 LSBs of each register are used. Bit D15 to Bit D12 are not
used in the register and are set to 0s. This register stores the
upper limit that activates the ALERT output. If the value in the
conversion result register is greater than the value in the
DATA
HIGH
register, an ALERT occurs for that channel. When
the conversion result returns to a value at least N LSBs below
the DATA
HIGH
register value, the ALERT output pin is reset. The
value of N is taken from the hysteresis register associated with
that channel. The ALERT pin can also be reset by writing to
Bit D2 in the command register.
Table 21. DATA
HIGH
Register (First Read/Write)
MSB
D15 D14 D13 D12 D11 D10 D9 D8
0 0 0 0 B11 B10 B9 B8
Table 22. DATA
HIGH
Register (Second Read/Write)
LSB
D7 D6 D5 D4 D3 D2 D1 D0
B7 B6 B5 B4 B3 B2 B1 B0
DATA
LOW
Register
The DATA
LOW
register for each channel is a 16-bit read/write
register; only the 12 LSBs of each register are used. Bit D15 to
Bit D12 are not used in the register and are set to 0s. The register
stores the lower limit that activates the ALERT output. If the
value in the T
SENSE
conversion result register is less than the value in
the DATA
LOW
register, an ALERT occurs for that channel. When
the conversion result returns to a value at least N LSBs above the
DATA
LOW
register value, the ALERT output pin is reset. The
value of N is taken from the hysteresis register associated with
that channel. The ALERT output pin can also be reset by
writing to Bit D2 in the command register.
Table 23. DATA
LOW
Register (First Read/Write)
MSB
D15 D14 D13 D12 D11 D10 D9 D8
0 0 0 0 B11 B10 B9 B8
Table 24. DATA
LOW
Register (Second Read/Write)
LSB
D7 D6 D5 D4 D3 D2 D1 D0
B7 B6 B5 B4 B3 B2 B1 B0