Datasheet

AD7280A
Rev. 0 | Page 36 of 48
Read Operation CRC
For reads from the AD7280A, the 8-bit CRC is generated by the
AD7280A based on Bits[D31:D10] of the 32-bit read cycle and is
transmitted using Bits[D9:D2] of the same read cycle. The data
received is divided by the CRC polynomial, and the 8-bit remain-
der, following the division, becomes the CRC bits, CRC_7 to
CRC_0. The user can compare the CRC bits calculated with the
CRC that was received from the AD7280A to verify that there was
no alteration in the data that was transmitted by the AD7280A.
When operating in a daisy chain, each AD7280A receives conver-
sion or register data from the device above it in the daisy chain
and performs a CRC calculation on the received data. If there is
a difference between the CRC generated internally and the CRC
received from the device above it in the daisy chain, the AD7280A
replaces the received CRC by an inversion of the internally gen-
erated CRC.
CRC Pseudocode
The following pseudocode can be used to calculate the CRC.
The following variables must first be declared:
• Num_Bits is the number of data bits used to calculate the
CRC result: 21 for a data write to the AD7280A, and 22 for
a data read from the AD7280A.
• i is an integer variable.
• xor_1, xor_2, xor_3, xor_4, and xor_5 are integer variables.
These outputs of the XOR gates start with the leftmost
XOR gate in the circuit implementation (see Figure 40).
• data_in represents the data bits that the CRC is calculated
on: Bits[D31:D11] for a write operation, and Bits[D31:D10]
for a read operation. This data supplies the input to the
first XOR gate.
• CRC_0, CRC_1, CRC_2, CRC_3, CRC_4, CRC_5, CRC_6,
and CRC_7 are integer variables. The outputs of the shift
registers start at the leftmost shift register in the circuit
implementation (see Figure 40).
With the exception of data_in, all variables should be initialized
to 0. The following code implements the CRC calculation as
shown in Figure 40.
for (i=Num_Bits; i>=0; i--)
{
xor_5 = CRC_4 ^ CRC_7;
xor_4 = CRC_2 ^ CRC_7;
xor_3 = CRC_1 ^ CRC_7;
xor_2 = CRC_0 ^ CRC_7;
xor_1 = data_in[i] ^ CRC_7;
CRC_7 = CRC_6;
CRC_6 = CRC_5;
CRC_5 = xor_5;
CRC_4 = CRC_3;
CRC_3 = xor_4;
CRC_2 = xor_3;
CRC_1 = xor_2;
CRC_0 = xor_1;
}
CRC Calculation Example 1
This example shows how a 32-bit write command, including the
CRC calculation, to the high byte of the control register on the
master device (Device 0) is assembled. The data to be written
is 0x0C.
The CRC is computed in the DSP/microprocessor on
Bits[D31:D11], that is, the device address, the register address,
the data to be written to the register, the address all parts bit,
and the reserved bit.
• Device address: 00000 (0x00)
• Register address: 001101 (0x0D)
• Data: 00001100 (0x0C)
• Address all parts bit: 0 (0x0)
• Reserved bit: 0 (0x0)
The data input to the CRC algorithm is, therefore,
000000011010000110000 (0x003430).
Following the completion of the calculation, the value
of CRC_7 to CRC_0 is 01010001 (0x51). The data that
is sent to the AD7280A for this serial write is, therefore,
0000 0001 1010 0001 1000 0010 1000 1010 (0x01A1828A).
CRC Calculation Example 2
This example shows how a 32-bit write command, including
the CRC calculation, to the high byte of the control register on
Device 1 in the daisy chain is assembled. The data to be written
is 0x0C.
The CRC is computed in the DSP/microprocessor on
Bits[D31:D11], that is, the device address, the register address,
the data to be written to the register, the address all parts bit,
and the reserved bit.
• Device address (written LSB first): 10000 (0x10)
• Register address: 001101 (0x0D)
• Data: 00001100 (0x0C)
• Address all parts bit: 0 (0x0)
• Reserved bit: 0 (0x0)
The data input to the CRC algorithm is, therefore,
100000011010000110000 (0x103430).
Following the completion of the calculation, the value of
CRC_7 to CRC_0 is 01110100 (0x74). The data that is sent
to the AD7280A for this serial write is, therefore,
1000 0001 1010 0001 1000 0011 1010 0010 (0x81A183A2).