Datasheet

AD7276/AD7277/AD7278
Rev. C | Page 23 of 28
04903-030
t
CONVERT
CS
SCLK
S
DATA
2 LEADING
ZEROS
THREE-
STATE
THREE-STATE
2 TRAILING
ZEROS
B
1/THROUGHPUT
1 2 3 4 5 13 15 1614
DB11 DB10 DB9 DB1 DB0 ZERO ZEROZEROZ
t
2
t
3
t
4
t
7
t
5
t
8
t
QUIET
t
1
t
6
Figure 32. AD7276 Serial Interface Timing Diagram 16 SCLK Cycle
0
4903-031
t
CONVERT
SCLK
B
1 2 3 4 10 11 12 14 161513
t
2
t
3
t
4
t
7
t
8
CS
t
1
S
DATA
2 LEADING
ZEROS
THREE-
STATE
THREE-STATE
4 TRAILING ZEROS
1/THROUGHPUT
DB9 DB8 DB0DB1 ZERO ZERO ZERO ZEROZEROZ
t
QUIET
t
5
t
6
Figure 33. AD7277 Serial Interface Timing Diagram
04903-032
t
3
t
7
t
8
CS
t
1
S
DATA
2 LEADING
ZEROS
THREE-
STATE
THREE-STATE
6 TRAILING ZEROS
1/THROUGHPUT
DB7 DB6 DB0DB1 ZERO ZERO ZEROZEROZ
t
QUIET
t
4
t
5
t
CONVERT
SCLK
B
1 2 3 4 8910 14 161511
t
2
t
6
Figure 34. AD7278 Serial Interface Timing Diagram
04903-033
t
8
CS
t
1
SDATA
2 LEADING ZEROS
8.5 (1/f
SCLK
)
THREE-
STATE
THREE-STATE
1/THROUGHPUT
t
QUIET
t
ACQ
t
CONVERT
SCLK
1 2 3 4 9 105
t
2
DB7 DB6 DB5 DB1 DB0ZEROZ
B
t
6
Figure 35. AD7278 in a 10 SCLK Cycle Serial Interface