Datasheet

AD7273/AD7274
Rev. 0 | Page 22 of 28
t
CONVERT
CS
SCLK
SDATA
TWO LEADING
ZEROS
THREE-
STATE
THREE-STATE
TWO TRAILING
ZEROS
B
1/THROUGHPUT
1 2 3 4 5 13 15 1614
DB11 DB10 DB9 DB1 DB0 ZERO ZEROZEROZ
t
2
t
3
t
4
t
7
t
5
t
8
t
QUIET
t
1
t
6
04973-037
Figure 37. AD7274 Serial Interface Timing Diagram 16 SCLK Cycle
t
CONVERT
SCLK
B
1 2 3 4 10 11 12 14 161513
t
2
t
3
t
4
t
7
t
8
CS
t
1
SDATA
TWO LEADING
ZEROS
THREE-
STATE
THREE-STATE
FOUR TRAILING
ZEROS
1/THROUGHPUT
DB9 DB8 DB0DB1 ZERO ZERO ZERO ZEROZEROZ
t
QUIET
t
5
t
6
04973-038
Figure 38. AD7273 Serial Interface Timing Diagram