Datasheet
AD7265
Rev. A | Page 14 of 28
V
DD
C1
D
D
V
IN+
R1
C2
V
DD
C1
D
D
V
IN–
R1
C2
04674-015
Figure 21 shows a graph of the THD vs. the analog input
frequency for various supplies while sampling at 1 MSPS. In this
case, the source impedance is 47 Ω.
04674-018
INPUT FREQUENCY (kHz)
6000 200100 400300 500
THD (dB)
–50
–60
–55
–65
–70
–75
–80
–85
–90
V
DD
= 3V
SINGLE-ENDED MODE
V
DD
= 5V
SINGLE-ENDED MODE
V
DD
= 3V
DIFFERENTIAL MODE
V
DD
= 5V
DIFFERENTIAL MODE
F
SAMPLE
= 1MSPS
V
DD
= 3V/5V
RANGE = 0 TO V
REF
Figure 18. Equivalent Analog Input Circuit,
Conversion Phase—Switches Open, Track Phase—Switches Closed
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum source
impedance depends on the amount of THD that can be toler-
ated. The THD increases as the source impedance increases and
performance degrades.
Figure 21. THD vs. Analog Input Frequency for Various Supply Voltages
Figure 19 shows a graph of the THD vs.
the analog input signal frequency for different source impedances
in single-ended mode, while
ANALOG INPUTS
Figure 20 shows the THD vs. the
analog input signal frequency for different source impedances
in differential mode.
The AD7265 has a total of 12 analog inputs. Each on-board
ADC has six analog inputs that can be configured as six single-
ended channels, three pseudo differential channels, or three
fully differential channels. These can be selected as described in
the
04674-016
INPUT FREQUENCY (kHz)
6000200100 400300 500
THD (dB)
–50
–60
–55
–65
–70
–75
–80
–85
–90
F
SAMPLE
= 1MSPS
V
DD
= 3V
RANGE = 0V TO V
REF
R
SOURCE
= 0Ω
R
SOURCE
= 10Ω
R
SOURCE
= 47Ω
R
SOURCE
= 100Ω
R
SOURCE
= 300Ω
Analog Input Selection section.
Single-Ended Mode
The AD7265 can have a total of 12 single-ended analog input
channels. In applications where the signal source has high
impedance, it is recommended to buffer the analog input before
applying it to the ADC. The analog input range can be pro-
grammed to be either 0 to V
or 0 to 2 × V .
REF REF
If the analog input signal to be sampled is bipolar, the internal
reference of the ADC can be used to externally bias up this
signal to make it correctly formatted for the ADC.
Figure 22
shows a typical connection diagram when operating the ADC
in single-ended mode.
Figure 19. THD vs. Analog Input Frequency for
Various Source Impedances, Single-Ended Mode
V
IN
0V
+1.25V
–1.25V
D
CAP
A/D
CAP
B
V
A1
V
B6
R
R
3R
R
0V
+2.5
V
0.47µF
1
ADDITIONAL PINS OMITTED FOR CLARITY.
04674-019
AD7265
1
04674-017
INPUT FREQUENCY (kHz)
6000200100 400300 500
THD (dB)
–
60
–65
–70
–75
–80
–85
–90
F
SAMPLE
= 1MSPS
V
DD
= 3V
RANGE = 0V TO V
REF
R
SOURCE
= 300Ω
R
SOURCE
= 0Ω
R
SOURCE
= 10Ω
R
SOURCE
= 47Ω
R
SOURCE
= 100Ω
Figure 22. Single-Ended Mode Connection Diagram
Figure 20. THD vs. Analog Input Frequency for
Various Source Impedances, Differential Mode