Datasheet

AD724–SPECIFICATIONS
REV. B
–2–
(Unless otherwise noted, V
S
= +5, T
A
= +25ⴗC, using FSC synchronous clock. All loads are
150 ⍀ ⴞ 5% at the IC pins. Outputs are measured at the 75 ⍀ reverse terminated load.)
Parameter Conditions Min Typ Max Units
SIGNAL INPUTS (RIN, GIN, BIN)
Input Amplitude Full Scale 714 mV p-p
Black Level
1
0.8 V
Input Resistance
2
RIN, GIN, BIN 1 MΩ
Input Capacitance 5pF
LOGIC INPUTS (HSYNC, VSYNC, FIN, ENCD, STND, SELECT) CMOS Logic Levels
Logic LO Input Voltage 1V
Logic HI Input Voltage 2V
Logic LO Input Current (DC) <1 µA
Logic HI Input Current (DC) <1 µA
VIDEO OUTPUTS
3
Luminance (LUMA)
Roll-Off @ 5 MHz NTSC –7 dB
PAL –6 dB
Gain Error –15 –3 +15 %
Nonlinearity ±0.3 %
Sync Level NTSC 243 286 329 mV
PAL 300 mV
DC Black Level 1.3 V
Chrominance (CRMA)
Bandwidth NTSC 3.6 MHz
PAL 4.4 MHz
Color Burst Amplitude NTSC 170 249 330 mV p-p
PAL 288 mV
Color Signal to Burst Ratio Error
4
±5%
Color Burst Width NTSC 2.51 µs
PAL 2.28 µs
Phase Error
5
±3 Degrees
DC Black Level 2.0 V
Chroma Feedthrough R, G, B = 0 15 40 mV p-p
Composite (COMP)
Absolute Gain Error With Respect to Luma –5 ±15 %
Differential Gain With Respect to Chroma 0.5 %
Differential Phase With Respect to Chroma 2.0 Degrees
DC Black Level 1.5 V
Chroma/Luma Time Alignment 0ns
POWER SUPPLIES
Recommended Supply Range Single Supply +4.75 +5.25 V
Quiescent Current—Encode Mode
6
33 42 mA
Quiescent Current—Power Down 1 mA
NOTES
1
R, G, and B signals are inputted via an external ac coupling capacitor.
2
Except during dc restore period (back porch clamp).
3
All outputs measured at a 75 Ω reverse-terminated load; ac voltages at the IC output pins are twice those specified here.
4
Ratio of chroma amplitude to burst amplitude, difference from ideal.
5
Difference between ideal color-bar phases and the actual values.
6
Driving the logic inputs with VOH < 4 V will increase static supply current approximately 150 µA per input.
Specifications are subject to change without notice.