Datasheet

A
2
B
2
T
2
Parameter Version Version Version Unit Test Conditions/Comments
STATIC PERFORMANCE
Resolution 12 12 12 Bits
Relative Accuracy @ 25°C
3
±3/4 ±1/2 ±1/2 LSB max
T
MIN
to T
MAX
±1 ±3/4 ±3/4 LSB max
T
MIN
to T
MAX
±1/2 LSB max V
DD
= 15 V ± 10%
Differential Nonlinearity
3
±1 ±1 ±1 LSB max Guaranteed Monotonic
Unipolar Offset Error @ 25°C
3
±3 ±3 ±3 LSB max V
SS
= 0 V or –12 V to –15 V
4
T
MIN
to T
MAX
±5 ±5 ±5 LSB max Typical Tempco is ±3 ppm of FSR
5
/°C.
Bipolar Zero Error @ 25°C
3
±3 ±2 ±2 LSB max R
OFS
connected to REF OUT; V
SS
= –12 V to –15 V
4
T
MIN
to T
MAX
±5 ±4 ±4 LSB max Typical Tempco is ±3 ppm of FSR
5
/°C.
DAC Gain Error
3, 6
±2 ±2 ±2 LSB max
Full-Scale Output Voltage Error
7
@ 25°C ±0.2 ±0.2 ±0.2 % of FSR max V
DD
= 15 V
∆Full Scale/∆V
DD
±0.06 ±0.06 ±0.06 % of FSR/V max V
DD
= +12 V to +15 V
4
∆Full Scale/∆V
SS
±0.01 ±0.01 ±0.01 % of FSR/V max V
SS
= –12 V to –15 V
4
Full-Scale Temperature Coefficient
8
±40 ±30 ±40 ppm of FSR/°C max V
DD
= 15 V
REFERENCE OUTPUT
REF OUT @ 25°C 4.99/5.01 4.99/5.01 4.99/5.01 V min/V max V
DD
= 15 V
∆REF OUT/∆V
DD
2 2 2 mV/V max V
DD
= 12 V to 15 V
4
Reference Temperature Coefficient ±25 ±25 ±35 ppm/°C typ
Reference Load Change
(∆REF OUT vs. ∆I) –1 –1 –1 mV max Reference Load Current Change (0–100 µA)
DIGITAL INPUTS
Input High Voltage, V
INH
2.4 2.4 2.4 V min
Input Low Voltage, V
INL
0.8 0.8 0.8 V max
Input Current, I
IN
±10 ±10 ±10 µA max V
IN
= 0 V to V
DD
Input Capacitance
9
8 8 8 pF max
ANALOG OUTPUTS
Output Range Resistors 15/30 15/30 15/30 kΩ min/kΩ max
Output Voltage Ranges
10
5, 10 5, 10 5, 10 V V
SS
= 0 V; Pin Strappable
5, 10, 5, 10, 5, 10, V
SS
= –12 V to –15 V;
4
Pin Strappable
±5 ±5 ±5V
DC Output Impedance 0.5 0.5 0.5 Ω typ
AC CHARACTERISTICS
9
Voltage Output Settling Time Settling Time to Within ± 1/2 LSB of Final Value
Positive Full-Scale Change 7 7 10 µs max DAC Latch All 0s to All 1s
Negative Full-Scale Change 7 7 10 µs max DAC Latch All 1s to All 0s; V
SS
= –12 V to –15 V
4
Output Voltage Slew Rate 2 2 1.5 V/µs min
Digital Feedthrough
3
10 10 10 nV-s typ
Digital-to-Analog Glitch Impulse 30 30 30 nV-s typ
POWER REQUIREMENTS
V
DD
+10.8/ +10.8/ +10.8/ V min/ For Specified Performance Unless Otherwise Stated
+16.5 +16.5 +16.5 V max
V
SS
–10.8/ –10.8/ –10.8/ V min/ For Specified Performance Unless Otherwise Stated
–16.5 –16.5 –16.5 V max
I
DD
@ 25°C 9 9 9 mA max Output Unloaded; Typically 5 mA
T
MlN
to T
MAX
10 10 12 mA max Output Unloaded
I
SS
(Dual Supplies) 3 3 5 mA max Output Unloaded; Typically 2 mA
NOTES
1
Power supply tolerance is ±10%.
2
Temperature ranges are as follows: A/B Versions; –40°C to +85°C; T Version; –55°C to +125°C.
3
See Terminology.
4
With appropriate power supply tolerances.
5
FSR means Full-Scale Range and is 5 V for the 0 V to 5 V output range and 10 V for both the 0 V to 10 V and ± 5 V output ranges.
6
This error is calculated with respect to the reference voltage and is measured after the offset error has been allowed for.
7
This error is calculated with respect to an ideal 4.9988 V on the 0 V to 5 V and ± 5 V ranges; it is calculated with respect to an ideal 9.9976 V on the 0 V to 10 V
range. It includes the effects of internal voltage reference, gain and offset errors.
8
Full-Scale TC = ∆FS/∆T, where ∆FS is the full-scale change from T
A
= 25°C to T
MIN
or T
MAX
.
9
Guaranteed by design and characterization, not production tested.
10
0 V to 10 V output range is available only when V
DD
≥ +14.25 V.
Specifications subject to change without notice.
AD7245A/AD7248A–SPECIFICATIONS
REV. B
–2–
(V
DD
= +12 V to +15 V,
1
V
SS
= O V or –12 V to –15 V,
1
AGND = DGND = O V, R
L
= 2 k⍀, C
L
= 100 pF. All specifications T
MIN
to T
MAX
unless otherwise noted.)