DAC-to-DAC Linear ty Matching Power Sup ly Cur ent vs. Temp ratu Noise Spectral Density vs. Frequ ncy Power Sup ly Rej ction Ratio vs. Frequ ncy Single Sup ly Sink Cur ent vs. Outp Voltage REV. 0 Linear ty vs.
External Reference CIRCUIT INFORMATION D/A Section Op Amp Section INTERFACE LOGIC INFORMATION—AD7247A Figure 2. D/A Simplfed Circut Diagrm Internal Reference Figure 4. AD7247A Input Contr l Logic Figure 5. AD7247A Write Cycle Tim ng Diagr m Figure 3. Interal Refrnc —8— REV.
Figure 6. AD7237A Input Contrl Logic Table II. AD7237A Truth Table Table I. AD7247A Truth Table CSA CSB WR CS WR A1 A0 LDAC Function Function INTERFACE LOGIC INFORMATION—AD7237A Figure 7. AD7237A Write Cycle Timng Diagrm REV.
Unipolar (0 V to +5 V) Configuration APPLYING THE AD7237A/AD7247A Bipolar Configuration Unipolar (0 V to +10 V) Configuration Figure 8. Unipolar (0 to +10 V) Configurat Figure 9. Bipolar Configurat Table III. Unipolar Code Table (0 to +10 V Range) Table IV. Bipolar Code Table DAC Latch Contents MSB LSB Analog Output, VOUT DAC Latch Contents MSB LSB — 1 0— Analog Output, VOUT REV.
MICROPROCESSOR INTERFACING—AD7247A AD7247A—MC68000 Interface AD7247A—ADSP-2101 Interface Figure 12. AD7247A to MC68000 Interfac MICROPROCESSOR INTERFACING—AD7237A Figure 10. AD7247A to ADSP-2101 Interfac AD7237A—8085A/8088 Interface AD7247A—8086 Interface Figure 11. AD7247A to 8086 Interfac Figure 13. AD7237A to 8085A/808 Interfac REV.
OUTLINE DIMENSIONS Plastic DIP (N-24) C174 —24—3/93 AD7237A—68008 Interface Cerdip (Q-24) Figure 14. AD7237A to 68008 Interfac AD7237A—6502/6809 Interface SOIC (R-24) PRINTED IN U.S.A. f Figure 15. AD7237A to 6502/6809 Interfac — 1 2— REV.
