Datasheet

AD7225
Rev. C | Page 19 of 24
MICROPROCESSER INTERFACE
*LINEAR CIRCUITRY OMITTED FOR CLARITY.
ADDRESS
DECODE
LATCH
EN
AD7225*
A0
A1
DB7
DB0
LDAC
WR
ADDRESS BUS
ADDRESS DATA BUS
8085A/
8088
A15
A8
ALE
AD0
AD7
WR
00986-025
*LINEAR CIRCUITRY OMITTED FOR CLARITY.
Z-80
A15
A8
D0
D7
AD7225*
WR
A0
A1
DB7
DB0
LDAC
WR
ADDRESS BUS
DATA BUS
ADDRESS
DECODE
EN
MREQ
00986-026
Figure 25. AD7225-to-8085A/8088 Interface, Double-Buffered Mode Figure 26. AD7225-to-Z-80 Interface, Double-Buffered Mode
*LINEAR CIRCUITRY OMITTED FOR CLARITY.
6809/
6502
A15
A0
E OR Φ2
D0
D7
AD7225*
R/W
A0
A1
DB7
DB0
LDAC
WR
ADDRESS BUS
DATA BUS
ADDRESS
DECODE
EN
00986-027
*LINEAR CIRCUITRY OMITTED FOR CLARITY.
68008
A23
A1
D0
D7
AD7225*
A0
A1
DB7
DB0
LDAC
WR
ADDRESS BUS
DATA BUS
ADDRESS
DECODE
EN
AS
R/W
DTACK
00986-028
Figure 27. AD7225-to-6809/6502 Interface, Single-Buffered Mode Figure 28. AD7225-to-68008 Interface, Single-Buffered Mode