Datasheet
AD7195
Rev. 0 | Page 9 of 44
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AIN2
NC
AIN3
NC
NC
AIN1
AIN4
NC
ACX1
NC
AGND
AV
DD
AINCOM
ACX1
ACX2
ACX2
AV
DD
DGND
REFIN(–)
NC
BPDSW
DV
DD
REFIN(+)
NOTES
1. NC = NO CONNECT.
2. CONNECT EXPOSED PAD TO AGND.
AGND
SCLK
MCLK2
NC
DOUT/RDY
DIN
SYNC
MCLK1
CS
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
AD7195
TOP VIEW
(Not to Scale)
08771-005
Figure 5.Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 ACX2
Digital Output. Provides a signal that can be used to control the reversing of the bridge excitation in ac
excited bridge applications. In ac mode, ACX2 toggles in anti-phase with ACX1. If the ACX bit equals zero (ac
excitation turned off), the ACX2 output remains low. When toggling, it is guaranteed to be nonoverlapping
with ACX1. The nonoverlap interval between ACX1 and ACX2 is 1/(master clock) which is equal to 200 ns
when a 4.92 MHz clock is used.
2
ACX2
Digital Output. Provides a signal that can be used to control the reversing of the bridge excitation in ac
excited bridge applications. This output is the inverse of ACX2. If the ACX bit equals zero (ac excitation turned
off), the ACX2 output remains high.
3 ACX1
Digital Output. Provides a signal that can be used to control the reversing of the bridge excitation in ac
excited bridge applications. When ACX1 is high, the bridge excitation is taken as normal and when ACX1 is
low, the bridge excitation is reversed (chopped). If the Bit ACX equals zero (ac excitation turned off), the ACX1
output remains high.
4
ACX1
Digital Output. Provides a signal that can be used to control the reversing of the bridge excitation in ac
excited bridge applications. This output is the inverse of ACX1. When ACX1 is low, the bridge excitation is
taken as normal and when ACX1 is high, the bridge excitation is reversed (chopped). If the ACX bit equals
zero (ac excitation turned off), the ACX1
output remains low.
5 AV
DD
Analog Supply Voltage, 4.75 V to 5.25 V. AV
DD
is independent of DV
DD
.
6 AGND Analog Ground Reference Point.
7 NC No Connect. This pin should be tied to AGND.
8 AINCOM Analog inputs AIN1 to AIN4 are referenced to this input when configured for pseudo differential operation.
9 AIN1
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN2 or as a pseudo differential input when used with AINCOM.
10 AIN2
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN1 or as a pseudo differential input when used with AINCOM.
11 NC No Connect. This pin should be tied to AGND.
12 NC No Connect. This pin should be tied to AGND.
13 NC No Connect. This pin should be tied to AGND.
14 NC No Connect. This pin should be tied to AGND.
15 AIN3
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN4 or as a pseudo differential input when used with AINCOM.
16 AIN4
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN3 or as a pseudo differential input when used with AINCOM.
17 REFIN(+)
Positive Reference Input. An external reference can be applied between REFIN(+) and REFIN(−). REFIN(+) can
lie anywhere between AV
DD
and AGND + 1 V. The nominal reference voltage, (REFIN(+) − REFIN(−)), is AV
DD
,
but the part functions with a reference from 1 V to AV
DD
.
18 REFIN(−) Negative Reference Input. This reference input can lie anywhere between AGND and AV
DD
− 1 V.
19 NC No Connect. This pin should be tied to AGND.