Datasheet

AD7193 Data Sheet
Rev. D | Page 30 of 56
OFFSET REGISTER
RS2, RS1, RS0 = 110; Power-On/Reset = 0x800000)
The offset register holds the offset calibration coefficient for the
ADC. The power-on reset value of the offset register is 0x800000.
The AD7193 has five offset registers. In differential mode, each
channel has a dedicated offset register. In pseudo differential
mode, Channel AIN1, Channel AIN2, Channel AIN3, and
Channel AIN4 have dedicated registers whereas the remaining
channels share an offset register (see Table 23 and Table 24).
Each of these registers is a 24-bit read/write register. This register
is used in conjunction with its associated full-scale register to
form a register pair. The power-on reset value is automatically
overwritten if an internal or system zero-scale calibration is
initiated by the user. The AD7193 must be placed in power-
down mode or idle mode when writing to the offset register.
FULL-SCALE REGISTER
RS2, RS1, RS0 = 111; Power-On/Reset = 0x5XXXX0
The full-scale register is a 24-bit register that holds the full-scale
calibration coefficient for the ADC. The AD7193 has five full-
scale registers. In differential mode, each channel has a dedicated
full-scale register. In pseudo differential mode, the AIN1, AIN2,
AIN3, and AIN4 channels have dedicated registers whereas the
remaining channels share a full-scale register (see Table 23 and
Table 24).
The full-scale registers are read/write registers. However, when
writing to the full-scale registers, the ADC must be placed in
power-down mode or idle mode. These registers are configured
at power-on with factory calibrated full-scale calibration coeffi-
cients, the calibration being performed at gain = 1. Therefore,
every device has different default coefficients. The default value
is automatically overwritten if an internal or system full-scale
calibration is initiated by the user or if the full-scale register is
written to.