Datasheet

AD7176-2 Data Sheet
Rev. A | Page 54 of 68
CHANNEL MAP REGISTER 1
Address: 0x11, Reset: 0x0001, Name: CHMAP1
The Channel Map Registers are 16-bit registers that are used to select which channels are currently active, which inputs are selected for
each channel, and which setup should be used to configure the ADC for that channel.
Table 31. Bit Descriptions for CHMAP1
Bits Bit Name Settings Description Reset Access
15 CH_EN1 This bit enables Channel 1. If more than one channel is enabled, the ADC
will automatically sequence between them.
0x0 RW
0 Disabled (default)
1
Enabled
14 RESERVED This bit is reserved and should be set to 0. 0x0 R
[13:12] SETUP_SEL1 These bits identify which of the four setups are used to configure the ADC
for this channel. A setup comprises a set of four registers: Setup Configuration
Register, Filter Configuration Register, Offset Register, Gain Register. All
channels can use the same setup, in which case the same 3-bit value should
be written to these bits on all active channels, or up to four channels can
be configured differently.
0x0 RW
000 Setup 0
001 Setup 1
010 Setup 2
011 Setup 3
[11:10] RESERVED These bits are reserved and should be set to 0. 0x0 R
[9:5] AINPOS1 These bits select which of the analog inputs is connected to the positive
input of the ADC for this channel.
0x0 RW
00000 AIN0 (default)
00001 AIN1
00010
AIN2
00011 AIN3
00100 AIN4
10101 REF+
10110 REF−
[4:0] AINNEG1 These bits select which of the analog inputs is connected to the negative
input of the ADC for this channel.
0x1 RW
00000 AIN0
00001 AIN1 (default)
00010 AIN2
00011 AIN3
00100 AIN4
10101 REF+
10110 REF−