Datasheet

AD7176-2 Data Sheet
Rev. A | Page 28 of 68
DIGITAL FILTERS
The AD7176-2 has three flexible filter options to allow for
optimization of noise, settling time, and rejection:
 Sinc5 + Sinc1 filter
 Sinc3 filter
 Enhanced 50 Hz and 60 Hz rejection filters
Figure 34. Digital Filter Block Diagram
The filter and output data rate is configured by setting the
appropriate bits in the filter configuration register for the
selected setup. See the Register Details section for more
information.
SINC5 + SINC1 FILTER
The Sinc5 + Sinc1 filter is targeted at fast switching multiplexed
applications and achieves single cycle settling at output data rates of
10 kSPS and lower. The Sinc5 block output is fixed at the maximum
rate of 250 kSPS, and the Sinc1 block output data rate can be varied
to control the final ADC output data rate. Figure 35 shows the
frequency domain response of the Sinc5 + Sinc1 filter at a 50 SPS
output data rate. The Sinc5 + Sinc1 filter has a slow roll-off over
frequency and narrow notches.
Figure 35. Sinc5 + Sinc1 Filter Response at 50 SPS ODR
The output data rates with the accompanying settling time and
rms noise for the Sinc5 + Sinc1 filter are shown in Table 18.
Table 18. AD7176-2 Output Data Rate (ODR), Noise, Settling Time (t
SETTLE
), and Rejection Using the Sinc5 + Sinc1 Filter
Output Data
Rate (SPS)
1
Settling
Time
1
Switching Rate
(Hz)
1
Notch Frequency
(Hz)
Rejection ± 1 Hz
(dB)
2
Noise
(μV rms)
Peak-to-Peak Resolution
with 5 V Reference (Bits)
250,000 20 μs 50,000 250,000 9.7 17.25
125,000 24 μs 41,667 125,000 7.4 17.6
62,500 32 μs 31,250 62,500 5.4 18.1
50,000 36 μs 27,778 50,000 5 18.2
31,250 48 μs 20,833 31,250 4 18.5
25,000 56 μs 17,857 25,000 3.6 18.7
15,625 80 μs 12,500 15,625 2.7 19.1
10,000 100 μs 10,000 11,905 2.5 19.2
5000 200 μs 5000 5435 1.8 19.7
2500 400 μs 2500 2604 1.3 20.2
1000 1.0 ms 1000 1016 0.82 20.8
500 2.0 ms 500.0 504 0.63 21.2
400 2.516 ms 400 400.00 0.62 21.2
200 5.0 ms 200.0 200.64 0.47 21.6
100 10.0 ms 100.0 100.16 0.46 21.7
60 16.68 ms 460 60.00 34 dB (60 Hz) 0.43 21.7
50 20.016 ms 50 50.00 34 dB (50 Hz) 0.42 21.8
20 50.0 ms 20.00 20.01 0.42 21.8
16.667 60.02 ms 16.66 16.67 0.42 21.8
10 100.02 ms 10.00 10.00 34 dB (50 Hz and 60 Hz) 0.38 22
5 200.02 ms 5.00 5.00 0.32 22.1
1
The settling time has been rounded to the nearest microsecond. This is reflected in the output data rate and switching rate. Switching rate = 1 ÷ t
SETTLE
.
2
Master clock = 160 MHz.
SINC1
SINC5
SINC3
50Hz AND 60Hz
POST FILTER
11037-058
0
–120
015010050
FILTER GAIN (dB)
FREQUENCY (Hz)
11037-059
–100
–80
–60
–40
–20