Datasheet

AD7152/AD7153
Rev. 0 | Page 9 of 24
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0 50 100 150 200 250 300 350
CAP LOAD TO GND (pF)
GAIN ERROR (%FSR)
07450-112
Figure 12. Capacitance Input Error vs. Capacitance Between EXC and GND,
Differential Mode, CIN(+) to EXC = 8 pF,
CIN(−) to EXC = 6 pF, V
DD
= 3.3 V
–10
–8
–6
–4
–2
0
2
1 10 100 1000
RESISTANCE CIN TO GROUND (MΩ)
GAIN ERROR (%FSR)
07450-113
Figure 13. Capacitance Input Error vs. Parasitic Resistance CIN to GND,
Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
1 10 100 1000
RESISTANCE EXC TO GROUND (MΩ)
GAIN ERROR (%FSR)
07450-114
Figure 14. Capacitance Input Error vs. Parasitic Resistance EXC to GND,
Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V
–50
–40
–30
–20
–10
0
10
1 10 100 1000
PARALLEL RESISTANCE (MΩ)
GAIN ERROR (%FSR)
07450-115
Figure 15. Capacitance Input Error vs. Parasitic Parallel Resistance
Single-Ended Mode, CIN(+) to EXC = 9 pF, VDD = 3.3 V
–30
–25
–20
–15
–10
–5
0
0204060801
SERIAL RESISTANCE (kΩ)
GAIN ERROR (%FSR)
3pF
9pF
00
07450-116
Figure 16. Capacitance Input Error vs. Serial Resistance,
Single-Ended Mode, CIN(+) to EXC = 3 pF and 9 pF, VDD = 3.3 V
–1.0
–0.8
–0.6
–0.4
–0.2
0.0
0.2
2.6 2.8 3.0 3.2 3.4 3.6 3.8
VDD (V)
GAIN ERROR (fF)
07450-117
Figure 17. Capacitance Input Power Supply Rejection (PSR),
Differential Mode; CIN(+) to EXC = 1.9 pF