Datasheet

AD7152/AD7153
Rev. 0 | Page 8 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
0.05
0.04
0.03
0.02
0.01
0
0.01
0.02
0.03
0.04
0.05
–2 –1 0 1 2
CAPACITANCE (pF)
INL (% of FSR)
07450-106
Figure 6. Capacitance Input Integral Nonlinearity,
V
DD
= 3.3 V, See Figure 34
–0.25
–0.20
–0.15
–0.10
–0.05
0.00
0.05
0.10
0.15
0.20
50 25 0 25 50 75 100
TEMPERATURE (°C)
GAIN ERROR (%FSR)
07450-107
TC ≈ 28ppm/°C
Figure 7. Capacitance Input Gain Drift vs. Temperature,
V
DD
= 3.3 V, Range = ±2 pF
–0.4
–0.2
0
0.2
0.4
–50 –25 0 25 50 75 100
TEMPERATURE (°C)
OFFSET CAPACITANCE (fF)
07450-108
Figure 8. Capacitance Input Offset Drift vs. Temperature,
V
DD
= 3.3 V, CIN and EXC Pins Open Circuit
–12
–10
–8
–6
–4
–2
0
2
0 50 100 150 200 250 300 350
CAP LOAD TO GND (pF)
GAIN ERROR (%FSR)
3pF
9pF
07450-109
Figure 9. Capacitance Input Error vs. Capacitance Between CIN and GND;
Single-Ended Mode, CIN(+) to EXC = 3 pF and 9 pF, V
DD
= 3.3 V
–12
–10
–8
–6
–4
–2
0
2
0 50 100 150 200 250 300 350
CAP LOAD TO GND (pF)
GAIN ERROR (%FSR)
2pF
07450-110
8pF
Figure 10. Capacitance Input Error vs. Capacitance Between CIN and GND,
Differential Mode, CIN(+) to EXC = 2 pF and 8 pF,
CIN(−) to EXC = 0 pF and 6 pF, V
DD
= 3.3 V
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0 50 100 150 200 250 300 350
CAP LOAD TO GND (pF)
GAIN ERROR (%FSR)
07450-111
Figure 11. Capacitance Input Error vs. Capacitance Between EXC and GND,
Single-Ended Mode, CIN(+) to EXC = 9 pF, V
DD
= 3.3 V