Datasheet

AD7152/AD7153
Rev. 0 | Page 13 of 24
REGISTER MAP
The master can write to or read from all of the registers except
the address pointer register, which is a write-only register. The
address pointer register determines which register the next read
or write operation accesses. All communications with the part
through the bus start with an access to the address pointer
register. After the part has been accessed over the bus and a
read/write operation is selected, the address pointer register is
set up. The address pointer register determines from or to which
register the operation takes place. A read/write operation is
performed from/to the target address, which then increments to
the next address until a stop command on the bus is performed.
Table 6. Register Summary
Register Name
Subaddress
Access Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Default
Value
Dec Hex
Status 0 0x00 R PWDN Unused Unused Unused Unused C1C2
RDY2
RDY1
0x03
Channel 1 Data MSB 1 0x01 R Channel 1 data, high byte 0x00
Channel 1 Data LSB 2 0x02 R Channel 1 data, low byte 0x00
Channel 2 Data MSB
1
3 0x03 R Channel 2 data, high byte 0x00
Channel 2 Data LSB 4 0x04 R Channel 2 data, low byte 0x00
Channel 1 Offset MSB 5 0x05 R/W Channel 1 offset calibration coefficient, high byte 0x80
Channel 1 Offset LSB 6 0x06 R/W Channel 1 offset calibration coefficient, low byte 0x00
Channel 2 Offset MSB
1
7 0x07 R/W Channel 2 offset calibration coefficient, high byte 0x80
Channel 2 Offset LSB
1
8 0x08 R/W Channel 2 offset calibration coefficient, low byte 0x00
Channel 1 Gain MSB 9 0x09 R/W Channel 1 gain coefficient, high byte, factory calibrated 0xXX
Channel 1 Gain LSB 10 0x0A R/W Channel 1 gain coefficient, low byte, factory calibrated 0xXX
Channel 1 Setup 11 0x0B R/W Range 1 Range 0 CAPDIFF Unused Unused 0x00
Channel 2 Gain MSB
1
12 0x0C R/W Channel 2 gain coefficient, high byte, factory calibrated 0xXX
Channel 2 Gain LSB
1
13 0x0D R/W Channel 2 gain coefficient, low byte, factory calibrated 0xXX
Channel 2 Setup
1
14 0x0E R/W Range 1 Range 0 CAPDIFF Unused Unused 0x00
Configuration 15 0x0F R/W Unused Unused Unused Ch1en Ch2en MD2 MD1 MD0 0x00
Reserved 16 0x10 R/W Unused 0x00
CAPDAC POS 17 0x11 R/W DACPen Unused Unused DACP Bits[4:0] value 0x00
CAPDAC NEG 18 0x12 R/W DACNen Unused Unused DACN Bits[4:0] value 0x00
Configuration2 26 0x1A R/W Unused Unused OSR1 OSR0 Unused Unused Unused Unused 0x00
1
AD7152 only.