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ManualsBrandsANALOG DEVICES ManualsData collecting ICsData acquisition IC - ADC 16 Bit LFCSP-32-VQ
51525354555657585960
AD7142
Rev. A | Page 50 of 72
BANK 2 REGISTERS
All address values are expressed in hexadecimal.
Table 33. STAGE0 Configuration Registers
Address Data Bit
Default
Value
Type Name Description
0x080 [15:0] X R/W STAGE0_CONNECTION[6:0] STAGE0 CIN(6:0) connection setup (see Table 45)
0x081 [15:0] X R/W STAGE0_CONNECTION[13:7] STAGE0 CIN(13:7) connection setup (see Table 46)
0x082 [15:0] X R/W STAGE0_AFE_OFFSET STAGE0 AFE offset control (see Table 47)
0x083 [15:0] X R/W STAGE0_SENSITIVITY STAGE0 sensitivity control (see Table 48)
0x084 [15:0] X R/W STAGE0_OFFSET_LOW STAGE0 initial offset low value
0x085 [15:0] X R/W STAGE0_OFFSET_HIGH STAGE0 initial offset high value
0x086 [15:0] X R/W STAGE0_OFFSET_HIGH_CLAMP STAGE0 offset high clamp value
0x087 [15:0] X R/W STAGE0_ OFFSET_LOW_CLAMP STAGE0 offset low clamp value
Table 34. STAGE1 Configuration Registers
Address Data Bit
Default
Value
Type Name Description
0x088 [15:0] X R/W STAGE1_CONNECTION[6:0] STAGE1 CIN(6:0) connection setup (see Table 45)
0x089 [15:0] X R/W STAGE1_CONNECTION[13:7] STAGE1 CIN(13:7) connection setup (see Table 46)
0x08A [15:0] X R/W STAGE1_AFE_OFFSET STAGE1 AFE offset control (see Table 47)
0x08B [15:0] X R/W STAGE1_SENSITIVITY STAGE1 sensitivity control (see Table 48)
0x08C [15:0] X R/W STAGE1_OFFSET_LOW STAGE1 initial offset low value
0x08D [15:0] X R/W STAGE1_OFFSET_HIGH STAGE1 initial offset high value
0x08E [15:0] X R/W STAGE1_OFFSET_HIGH_CLAMP STAGE1 offset high clamp value
0x08F [15:0] X R/W STAGE1_OFFSET_LOW_CLAMP STAGE1 offset low clamp value
Table 35. STAGE2 Configuration Registers
Address Data Bit
Default
Value
Type Name Description
0x090 [15:0] X R/W STAGE2_CONNECTION[6:0] STAGE2 CIN(6:0) connection setup (see Table 45)
0x091 [15:0] X R/W STAGE2_CONNECTION[13:7] STAGE2 CIN(13:7) connection setup (see Table 46)
0x092 [15:0] X R/W STAGE2_AFE_OFFSET STAGE2 AFE offset control (see Table 47)
0x093 [15:0] X R/W STAGE2_SENSITIVITY STAGE2 sensitivity control (see Table 48)
0x094 [15:0] X R/W STAGE2_OFFSET_LOW STAGE2 initial offset low value
0x095 [15:0] X R/W STAGE2_OFFSET_HIGH STAGE2 initial offset high value
0x096 [15:0] X R/W STAGE2_OFFSET_HIGH_CLAMP STAGE2 offset high clamp value
0x097 [15:0] X R/W STAGE2_OFFSET_LOW_CLAMP STAGE2 offset low clamp value