Datasheet

AD7142
Rev. A | Page 48 of 72
Table 29. STAGE_COMPLETE_LIMIT_INT Register
1
Address Data Bit
Default
Value
Type Name Description
0x00A [0] 0 R STAGE0_COMPLETE_STATUS_INT STAGE0 conversion complete register interrupt status
1 = indicates STAGE0 conversion completed
[1] 0 STAGE1_COMPLETE_STATUS_INT STAGE1 conversion complete register interrupt status
1 = indicates STAGE1 conversion completed
[2] 0 STAGE2_COMPLETE_STATUS_INT STAGE2 conversion complete register interrupt status
1 = indicates STAGE2 conversion completed
[3] 0 STAGE3_COMPLETE_STATUS_INT STAGE3 conversion complete register interrupt status
1 = indicates STAGE3 conversion completed
[4] 0 STAGE4_COMPLETE_STATUS_INT STAGE4 conversion complete register interrupt status
1 = indicates STAGE4 conversion completed
[5] 0 STAGE5_COMPLETE_STATUS_INT STAGE5 conversion complete register interrupt status
1 = indicates STAGE5 conversion completed
[6] 0 STAGE6_COMPLETE_STATUS_INT STAGE6 conversion complete register interrupt status
1 = indicates STAGE6 conversion completed
[7] 0 STAGE7_COMPLETE_STATUS_INT STAGE7 conversion complete register interrupt status
1 = indicates STAGE7 conversion completed
[8] 0 STAGE8_COMPLETE_STATUS_INT STAGE8 conversion complete register interrupt status
1 = indicates STAGE8 conversion completed
[9] 0 STAGE9_COMPLETE_STATUS_INT STAGE9 conversion complete register interrupt status
1 = indicates STAGE9 conversion completed
[10] 0
STAGE10_COMPLETE_STATUS_INT
STAGE10 conversion complete register interrupt status
1 = indicates STAGE10 conversion completed
[11] 0
STAGE11_COMPLETE_STATUS_INT
STAGE11 conversion complete register interrupt status
1 = indicates STAGE11 conversion completed
[12] 0 GPIO_STATUS GPIO input pin status
1 = indicates level on GPIO pin has changed
[15:13] Unused Set unused register bits = 0
1
Registers self-clear to 0 after readback, provided that the limits are not exceeded.
Table 30. CDC 16-Bit Conversion Data Registers
Address Data Bit
Default
Value
Type Name Description
0x00B [15:0] 0 R ADC_RESULT_S0 STAGE0 CDC 16-bit conversion data
0x00C [15:0] 0 R ADC_RESULT_S1 STAGE1 CDC 16-bit conversion data
0x00D [15:0] 0 R ADC_RESULT_S2 STAGE2 CDC 16-bit conversion data
0x00E [15:0] 0 R ADC_RESULT_S3 STAGE3 CDC 16-bit conversion data
0x00F [15:0] 0 R ADC_RESULT_S4 STAGE4 CDC 16-bit conversion data
0x010 [15:0] 0 R ADC_RESULT_S5 STAGE5 CDC 16-bit conversion data
0x011 [15:0] 0 R ADC_RESULT_S6 STAGE6 CDC 16-bit conversion data
0x012 [15:0] 0 R ADC_RESULT_S7 STAGE7 CDC 16-bit conversion data
0x013 [15:0] 0 R ADC_RESULT_S8 STAGE8 CDC 16-bit conversion data
0x014 [15:0] 0 R ADC_RESULT_S9 STAGE9 CDC 16-bit conversion data
0x015 [15:0] 0 R ADC_RESULT_S10 STAGE10 CDC 16-bit conversion data
0x016 [15:0] 0 R ADC_RESULT_S11 STAGE11 CDC 16-bit conversion data