Datasheet

AD708
Rev. C | Page 10 of 16
THEORY OF OPERATION
CROSSTALK PERFORMANCE
The AD708 exhibits very low crosstalk as shown in Figure 25,
Figure 26, and Figure 27. Figure 25 shows the offset voltage
induced on Side B of the AD708 when Side A output is moving
slowly (0.2 Hz) from −10 V to +10 V under no load. This is the
least stressful situation to the part because the overall power in
the chip does not change. Only the location of the power in the
output device changes.
Figure 26 shows the input offset voltage
change to Side B when Side A is driving a 2 k load. Here the
power changes in the chip with the maximum power change
occurring at 7.5 V.
Figure 27 shows crosstalk under the most
severe conditions. Side A is connected as a follower with
0 V input, and is forced to sink and source ±5 mA of output
current.
Power = (30 V)(5 mA) = 150 mW
Even this large change in power causes only an 8 V (linear)
change in the input offset voltage of Side B.
05789-025
V
OUTA
= 2V/DIV
V
OSB
= 1µV/DI
V
2V
AV
OUTA
V
IN
= ±10V
BV
OUTB
10k
10 10
Figure 25. Crosstalk with No Load
05789-026
V
OUTA
= 2V/DIV
V
OSB
= 1µV/DI
V
2V
AV
OUTA
V
IN
= ±10V
BV
OUTB
10k
2k
10 10
Figure 26. Crosstalk with 2 kΩ Load
05789-027
IN
A
= 1mA/DIV
V
OSB
= 2µV/DI
V
2V
A
V
IN
= ±10V
I
IN
= ±5m
A
BV
OUTB
10k
2k
10 10
Figure 27. Crosstalk Under Forced Source and Sink Conditions