Datasheet
AD698
REV. B
–11–
V
OUT
=
2× R
S
R
G
+1
×V
IN
Solving for V
OUT
/V
IN
= 400 and setting R
G
= 100 Ω then:
R
S
= [400 – 1] × R
G
/2 = 19.95 kΩ
Choose an oscillator amplitude that is in the range of 1 V to
3.5 V rms. For an input excitation level of 3 V rms, the output
signal from the amplifier gain stage will be 3.5 V rms × 0.8 V or
2.4 V rms, which is in the acceptable range.
Since A/B is known, the value of R2, the output FS resistor may
be chosen by the formula:
V
OUT
= A/B × 500 µA × R2
For a 10 V output at FS, with an A/B of 0.8; solve for R2.
R2 = 10 V [0.8 × 500 µA] = 25.0 kΩ
This will result in a V
OUT
of 10 V for a full-scale signal from the
bridge. The other components, C1, C2, C3, C4 may be selected
by following the guidelines on general device operation men-
tioned earlier.
If a gain trim is required, then a trim resistor can be used to ad-
just either R2 or R
G
. Bridge offsets should be adjusted by a trim
network on the OFFSET 1 and OFFSET 2 pins of the AD698.
R1
C1
C2
C3
R4
R3
C4
R2
1000pF
SIGNAL
REFERENCE
R
L
V
OUT
100nF6.8µF–15V
+15V
100nF
6.8µF
AB
C
D
PHASE
LAG/LEAD
NETWORK
13
16
15
14
24
23
22
21
20
19
18
17
12
11
10
9
8
1
2
3
4
7
6
5
AD698
–V
S
EXC1
EXC2
LEV1
LEV2
FREQ1
BFILT1
BFILT2
–BIN
+BIN
–AIN
FREQ2
SIG REF
OFFSET2
OFFSET1
+V
S
OUT FILT
FEEDBACK
SIG OUT
–ACOMP
AFILT2
AFILT1
+ACOMP
+AIN
A2
R
S
A1
R
S
RESISTORS,
INDUCTORS
OR CAPACITORS
R
T
AB
CD
PHASE LEAD
R
S
C
C
R
S
R
S
R
T
A
B
CD
PHASE LAG
C
PHASE LAG = Arc Tan (Hz RC);
PHASE LEAD = Arc Tan 1/(Hz RC)
WHERE R = R
S
// (R
S
+ R
T
)
R
G
DUAL
OP AMP
Figure 20. AD698 Interconnection Diagram for AC Bridge Applications