Datasheet

AD679
REV. D
–4–
Parameter Symbol Min Max Unit
SC Delay t
SC
50 ns
Conversion Time t
C
6.3 µs
Conversion Rate
1
t
CR
7.8 µs
Convert Pulse Width t
CP
0.097 3.0 µs
Aperture Delay t
AD
520ns
Status Delay t
SD
0 400 ns
Access Time
2, 3
t
BA
10 100 ns
10 57
4
ns
Float Delay
5
t
FD
10 80 ns
Output Delay t
OD
0ns
Format Setup t
FS
100 ns
OE Delay t
OE
20 ns
Read Pulse Width t
RP
195 ns
Conversion Delay t
CD
400 ns
EOCEN Delay t
EO
50 ns
NOTES
1
Includes acquisition time.
2
Measured from the falling edge of OE/EOCEN (0.8 V) to the time at which the
data lines/EOC cross 2.0 V or 0.8 V. See Figure 4.
3
C
OUT
= 100 pF.
4
C
OUT
= 50 pF.
5
Measured from the rising edge of OE/EOCEN (2.0 V) to the time at which the output voltage changes by 0.5. See Figure 4; C
OUT
= 10 pF.
Specifications subject to change without notice.
(All device types T
MIN
to T
MAX
, V
CC
= +12 V  5%, V
EE
= –12 V
 5%, V
DD
= +5 V  10%)
NOTES
1
IN ASYNCHRONOUS MODE, STATE OF CS DOES NOT AFFECT OPERATION.
SEE THE START CONVERSION TRUTH TABLE FOR DETAILS.
2
EOCEN = LOW (SEE FIGURE 3). IN SYNCHRONOUS MODE, EOC IS A THREE-
STATE OUTPUT. IN ASYNCHRONOUS MODE, EOC IS AN OPEN DRAIN OUTPUT.
3
DATA SHOULD NOT BE ENABLED DURING A CONVERSION.
Figure 1. Conversion Timing
Figure 2. Output Timing
NOTE
1
EOC IS A THREE-STATE OUTPUT IN SYNCHRONOUS MODE
AND AN OPEN DRAIN OUTPUT IN ASYNCHRONOUS. ACCESS (t
BA
)
AND FLOAT (t
FD
) TIMING SPECIFICATIONS DO NOT APPLY IN
ASYNCHRONOUS MODE WHERE THEY ARE A FUNCTION OF THE
TIME CONSTANT FORMED BY THE 10pF OUTPUT CAPACITANCE
AND THE PULL-UP RESISTOR.
Figure 3. EOC Timing
TEST V
CP
C
OUT
ACCESS TIME HIGH Z TO LOGIC LOW 5V 100pF
FLOAT TIME LOGIC HIGH TO HIGH Z 0V 10pF
ACCESS TIME HIGH Z TO LOGIC HIGH 0V 100pF
FLOAT TIME LOGIC LOW TO HIGH Z 5V 10pF
I
OL
I
OH
D
OUT
V
CP
C
OUT
Figure 4. Load Circuit for Bus Timing Specifications
TIMING SPECIFICATIONS