Datasheet

AD6644
Rev. D | Page 5 of 24
AD6644AST-40/65
Parameter Name Temp Test Level
1
Min Typ Max
Unit
DATA READY (DRY
6
)/DATA, OVR
Data Ready to DATA Delay (Hold Time)
3
t
H_DR
See note
7
Encode = 65 MSPS (50% Duty Cycle) Full IV 8.0 8.6 9.4 ns
Encode = 40 MSPS (50% Duty Cycle) Full IV 12.8 13.4 14.2 ns
Data Ready to DATA Delay (Setup Time)
3
t
S_DR
See note
7
@ 65 MSPS (50% Duty Cycle) Full IV 3.2 5.5 6.5 ns
@ 40 MSPS (50% Duty Cycle) Full IV 8.0 10.3 11.3 ns
APERTURE DELAY t
A
25°C V 100 ps
APERTURE UNCERTAINTY (JITTER) t
J
25°C V 0.2 ps rms
1
See the Explanation of Test Levels section.
2
Several timing parameters are a function of t
ENC
and t
ENCH
.
3
To compensate for a change in duty cycle for t
H_DR
and t
S_DR
use the following equations:
Newt
H_DR
= (t
H_DR
− % Change(t
ENCH
)) × t
ENC
/2
Newt
S_DR
= (t
S_DR
− % Change(t
ENCH
)) × t
ENC
/2
4
ENCODE to data delay (hold time) is the absolute minimum propagation delay through the ADC.
5
ENCODE to data delay (setup time) is calculated relative to 65 MSPS (50% duty cycle). To calculate t
S_E
for a given encode, use the following equation:
Newt
S_E
= t
ENC(NEW)
− t
ENC
+ t
S_E
(that is, for 40 MSPS, Newt
S_E(TYP)
= 25 × 10
−9
− 15.38 × 10
−9
+ 9.8 × 10
−9
= 19.4 × 10
−9
).
6
DRY is an inverted and delayed version of the encode clock. Any change in the duty cycle of the clock correspondingly changes the duty cycle of DRY.
7
Data ready to data delay (t
H_DR
and t
S_DR
) is calculated relative to 65 MSPS (50% duty cycle) and is dependent on t
ENC
and duty cycle. To calculate t
H_DR
and t
S_DR
for a
given encode, use the following equations:
Newt
H_DR
= t
ENC(NEW)
/2 − t
ENCH
+ t
H_DR
(that is, for 40 MSPS, Newt
H_DR(TYP)
= 12.5 × 10
−9
− 7.69 × 10
−9
+ 8.6 × 10
−9
= 13.4 × 10
−9
).
Newt
S_DR
= t
ENC(NEW)
/2 − t
ENCH
+ t
S_DR
(that is, for 40 MSPS, Newt
S_DR(TYP)
= 12.5 × 10
−9
− 7.69 × 10
−9
+ 5.5 × 10
−9
= 10.3 × 10
−9
).
AC SPECIFICATIONS
All ac specifications tested by driving ENCODE and
ENCODE
differentially.
AV
CC
= 5 V, DV
CC
= 3.3 V; ENCODE and
ENCODE
= maximum conversion rate MSPS; T
MIN
= −25°C, T
MAX
= +85°C, unless otherwise noted.
Table 5.
AD6644AST-40 AD6644AST-65
Parameter Conditions Temp Test Level
1
Min Typ Max Min Typ Max
Unit
SNR
Analog Input 2.2 MHz 25°C V 74.5 74.5 dB
@ −1 dBFS 15.5 MHz 25°C II 74.0 72 74.0 dB
30.5 MHz 25°C II 73.5 72 73.5 dB
SINAD
2
Analog Input 2.2 MHz 25°C V 74.5 74.5 dB
@ −1 dBFS 15.5 MHz 25°C II 74.0 72 74.0 dB
30.5 MHz 25°C V 73.0 73.0 dB
WORST HARMONIC (2ND or 3RD)
2
Analog Input 2.2 MHz 25°C V 92 92 dBc
@ −1 dBFS 15.5 MHz 25°C II 90 83 90 dBc
30.5 MHz 25°C V 85 85 dBc
WORST HARMONIC (4TH or Higher)
2
Analog Input 2.2 MHz 25°C V 93 93 dBc
@ −1 dBFS 15.5 MHz 25°C II 92 85 92 dBc
30.5 MHz 25°C V 92 92 dBc
TWO-TONE SFDR
2, 3, 4
Full V 100 100 dBFS
TWO-TONE IMD REJECTION
2, 4
F1, F2 @ −7 dBFS Full V 90 90 dBc
ANALOG INPUT BANDWIDTH 25°C V 250 250 MHz
1
See the Explanation of Test Levels section.
2
AV
CC
= 5 V to 5.25 V for rated ac performance.
3
Analog input signal power swept from −7 dBFS to −100 dBFS.
4
F1 = 15 MHz, F2 = 15.5 MHz.