Datasheet

REV. 0 –3–
AD6600
TIMING REQUIREMENTS AND SWITCHING SPECIFICATIONS
1
(AVCC = 5 V, DVCC = 3.3 V; ENC and ENC = 20 MSPS; T
MIN
= –40C, T
MAX
= +85C unless otherwise noted.)
Test AD6600AST
Parameter Name Temp Level Min Typ Max Unit
A/D CONVERTER
Conversion Rate f
ENC
1/(t
ENC
) MSPS
Maximum Conversion Rate Full II 20 MSPS
Minimum Conversion Rate Full IV 6 MSPS
Aperture Uncertainty t
j
25°C V 0.3 ps rms
ENCODE INPUTS (ENC, ENC)
2
Period t
ENC
Full II 50 ns
Pulsewidth High
3
t
ENCH
Full IV 20 ns
Pulsewidth Low
4
t
ENCL
Full IV 20 ns
2× CLOCK OUTPUT (CLK2×)
5
Output Frequency 2× f
ENC
MSPS
Output Period
6
t
CLK2×_1
Full V t
ENCL
ns
t
CLK2×_2
Full V t
ENCH
ns
CLK2× Pulsewidth Low
6
t
CLK2×L
Full V t
ENCH
/2 ns
Output Risetime
7
Full V 3 ns
Output Falltime
7
Full V 2.6 ns
OUTPUT RISE/FALL TIMES
8
Output Risetime (D10:D0, RSSI2:0) Full V 8 ns
Output Falltime (D10:D0, RSSI2:0) Full V 8.4 ns
Output Risetime (AB_OUT) Full V 6 ns
Output Falltime (AB_OUT) Full V 6.2 ns
NOTES
1
See AD6600 Timing Diagrams.
2
All switching specifications tested by driving ENC and ENC differentially.
3
Several timing specifications are a function of Encode high time, t
ENCH
; these specifications are shown in the data tables and timing diagrams. Encode duty cycle
should be kept as close to 50% as possible.
4
Encode pulse low directly affects the amount of settling time available at FLT resonant port. See External Analog (Resonant) Filter section for details.
5
The 2× Clock is generated internally, therefore some specifications are functions of encode period and duty cycle. All timing measurements to or from CLK2 × are
referenced to 2.0 V crossing.
6
This specification IS a function of Encode period and duty cycle; reference timing diagrams Figure 8.
7
Output rise time is measured from 20% point to 80% point of total CLK2× voltage swing; output fall time is measured from 80% point to 20% point of total CLK2 ×
voltage swing.
8
Output rise time is measured from 20% point to 80% point of total data voltage swing; output fall time is measured from 80% point to 20% point of total data voltage
swing. All outputs specified with 10 pF load.
Specifications subject to change without notice.