Datasheet
AD652
Rev. C | Page 21 of 28
00798-031
–V
S
φ
2
+V
S
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
0.02µF
V
OLTS
OUT
V
2
+5V
4kΩ
MPX INPUT
–V
S
φ
3
+V
S
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
0.02µF
VOLTS
OUT
V
3
–V
S
φ
4
+V
S
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
0.02µF
VOLTS
OUT
V
4
1N4148
φ
2,
φ
3,
φ
4 ARE PINS 15, 7, 6 OF TIM9904A FROM DEMUX FIGURE 30
Figure 31. Demultiplexer Frequency-to-Voltage Conversion
00798-032
+5V
TRANSFORMER
PICO 31080
24 TURNS
T50- MICROMETALS
CK
'74
Q
D
CK
'74
Q
D
Q
500Ω
+15V
1
2
3
4
5
6
7
–15V
8
16
15
14
13
12
11
10
9
ONE
SHOT
AND
"D"
FLOP
QCK
D
Q
1mA
20kΩ
AD652
SYNCHRONOUS
VOLTAGE-TO-
FREQUENCY
CONVERTER
5V
REFERENCE
0.02µF
1nF
LO
HI
V
IN
3kΩ
1kΩ
1nF
6N137
OPTO-
ISOLATOR
5 4
6 3
7 2
8 1
ISOLATION BARRIER
FREQUENCY
OUTPUT
2N6659 2N6659
MYLAR
0.01µF
+5V
10µH
100Ω100Ω
12 3
1.65kΩ1.65kΩ
AD654
1 8
2 7
3 6
4 5
DRIVER
OSC
200pF
1.2kΩ
6.8kΩ
10kΩ
1.5kΩ
V
AD589
1.2V
+5V
1N4148
4567
+15V
REG
7815
–15V
REG
7915
47µF47µF
47µF47µF
+15V–15V
10kΩ
Figure 32. Isolated Synchronous VFC
Analog Signal Reconstruction
If it is desired to reconstruct the analog voltages from the
multiplex signal, three more AD652 SVFC devices are used as
frequency-to-voltage converters, as shown in Figure 31. The
comparator inputs of all the devices are strapped together, the
“+” inputs are held at a 1.2 V TTL threshold, and the “−” inputs
are driven by the multiplex input. The three clock inputs are
driven by the
ϕ
outputs of the clock chip. Remember that data
at the comparator input of the SVFC is loaded on the falling
edge of the clock signal and shifted out on the next rising edge.
Note that the frequency signals for each data channel are
available at the frequency output pin of each FVC.