Datasheet

AD637
Rev. K | Page 6 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
BUFF IN 1
NC 2
COMMON
3
OUTPUT OFFSET 4
BUFF OUT 14
V
IN
13
NC
12
+V
S
11
CS 5 –V
S
10
DEN INPUT 6 RMS OUT 9
dB OUTPUT 7 C
AV
8
NC = NO CONNECT
AD637
TOP VIEW
(Not to Scale)
00788-002
Figure 2. 14-Lead SBDIP/CERDIP Pin Configuration
BUFF IN 1
NC 2
COMMON
3
OUTPUT OFFSET
4
BUFF OU
T
16
V
IN
15
NC
14
+V
S
13
CS
5
–V
S
12
DEN INPUT
6
RMS OUT
11
dB OUTPUT 7 C
AV
10
NC 8 NC 9
NC = NO CONNECT
AD637
TOP VIEW
(Not to Scale)
00788-003
Figure 3. 16-Lead SOIC_W Pin Configuration
Table 3. 14-Lead SBDIP/CERDIP Pin Function Descriptions
Pin No. Mnemonic Description
1 BUFF IN Buffer Input
2, 12 NC No Connection
3 COMMON Analog Common
4 OUTPUT OFFSET Output Offset
5 CS Chip Select
6 DEN INPUT Denominator Input
7 dB OUTPUT dB Output
8 C
AV
Averaging Capacitor Connection
9 RMS OUT RMS Output
10 −V
S
Negative Supply Rail
11 +V
S
Positive Supply Rail
13 V
IN
Signal Input
14 BUFF OUT Buffer Output
Table 4. 16-Lead SOIC_W Pin Function Descriptions
Pin No. Mnemonic Description
1 BUFF IN Buffer Input
2, 8, 9, 14 NC No Connection
3 COMMON Analog Common
4 OUTPUT OFFSET Output Offset
5 CS Chip Select
6 DEN INPUT Denominator Input
7 dB OUTPUT dB Output
10 C
AV
Averaging Capacitor Connection
11 RMS OUT RMS Output
12 −V
S
Negative Supply Rail
13 +V
S
Positive Supply Rail
15 V
IN
Signal Input
16 BUFF OUT Buffer Output