Datasheet

Data Sheet AD633
Rev. J | Page 5 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
AD633JN/AD633AN
1
1
A
1
10V
1X1
2X2
3
Y1
4Y2
8 +V
S
7 W
Z
6
5 –V
S
00786-001
W = + Z
(X1 – X2)(Y1 – Y2)
10V
Figure 2. 8-Lead PDIP
AD633JR/AD633AR
1
1
1
10V
1
Y1
2Y2
3–V
S
4Z
8 X2
7 X1
+V
S
6
5 W
00786-002
A
W = + Z
(X1 – X2)(Y1 – Y2)
10V
Figure 3. 8-Lead SOIC
Table 4. 8-Lead PDIP Pin Function Descriptions
Pin No. Mnemonic Description
1 X1 X Multiplicand Noninverting Input
2
X2
X Multiplicand Inverting Input
3 Y1 Y Multiplicand Noninverting Input
4 Y2 Y Multiplicand Inverting Input
5 −V
S
Negative Supply Rail
6 Z Summing Input
7
W
Product Output
8 +V
S
Positive Supply Rail
Table 5. 8-Lead SOIC Pin Function Descriptions
Pin No. Mnemonic Description
1 Y1 Y Multiplicand Noninverting Input
2
Y2
Y Multiplicand Inverting Input
3 −V
S
Negative Supply Rail
4 Z Summing Input
5 W Product Output
6 +V
S
Positive Supply Rail
7
X1
X Multiplicand Noninverting Input
8 X2 X Multiplicand Inverting Input