Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Table of Contents
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Using the AD627
- Basic Connections
- Setting the Gain
- Reference Terminal
- Input Range Limitations in Single-Supply Applications
- Output Buffering
- Input and Output Offset Errors
- Make vs. Buy: A Typical Application Error Budget
- Errors Due to AC CMRR
- Ground Returns for Input Bias Currents
- Layout and Grounding
- Input Protection
- RF Interference
- Applications Circuits
- Outline Dimensions

AD627 Data Sheet
Rev. E | Page 8 of 24
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
R
G
1
–IN
2
+IN
3
–V
S
4
R
G
8
+V
S
7
OUTPUT
6
REF
5
AD627
TOP VIEW
(Not to Scale)
00782-051
Figure 3. 8-Lead PDIP Pin Configuration
1
2
3
4
8
7
6
5
AD627
TOP VIEW
(Not to Scale)
R
G
–IN
+IN
–V
S
R
G
+V
S
OUTPUT
REF
00782-052
Figure 4. 8-Lead SOIC_N Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 R
G
External Gain Setting Resistor. Place gain setting resistor across R
G
pins to set the gain.
2 −IN Negative Input.
3 +IN Positive Input.
4 −V
S
Negative Voltage Supply Pin.
5 REF Reference Pin. Drive with low impedance voltage source to level shift the output voltage.
6 OUTPUT Output Voltage.
7 +V
S
Positive Supply Voltage.
8
R
G
External Gain Setting Resistor. Place gain setting resistor across R
G
pins to set the gain.