Datasheet

AD623 Data Sheet
Rev. G | Page 26 of 32
The circuit in Figure 74 must be built using a printed circuit
board (PCB) with a ground plane on both sides. All component
leads must be as short as possible. The R1 and R2 resistors can
be common 1% metal film units. However, the C1 and C2
capacitors must be ±5% tolerance devices to avoid degrading
the common-mode rejection of the circuit. Either the traditional
5% silver mica units or Panasonic ±2% polyphenylene sulfide (PPS)
film capacitors are recommended.
In many applications, shielded cables minimize noise. For
optimal CMR over frequency, the shield must be properly driven.
Figure 75 shows an active guard driver that is configured to
improve ac common-mode rejection by bootstrapping the
capacitances of input cable shields, thus minimizing the
capacitance mismatch between the inputs.
AD623
OUTPUT
REF
+V
S
–V
S
2
1
8
3
6
5
7
4
R
G
2
R
G
2
AD8031
100Ω
00778-045
–IN
+IN
Figure 75. Common-Mode Shield Driver
GROUNDING
Because the AD623 output voltage is developed with respect
to the potential on the reference terminal, many grounding
problems can be solved by simply tying the REF pin to the
appropriate local ground. Tie the REF pin to a low impedance
point for optimal CMR.
The use of ground planes is recommended to minimize the
impedance of ground returns (and therefore the size of dc
errors). To isolate low level analog signals from a noisy digital
environment, many data acquisition components have separate
analog and digital ground returns (see Figure 76). All ground
pins from mixed signal components, such as analog-to-digital
converters (ADCs), must be returned through the high quality
analog ground plane. Maximum isolation between analog and
digital is achieved by connecting the ground planes back at the
supplies. The digital return currents from the ADC that flow in
the analog ground plane, in general, have a negligible effect on
noise performance.
If there is only a single power supply available, it must be shared
by both digital and analog circuitry. Figure 77 shows how to
minimize interference between the digital and analog circuitry.
As in the previous case, use separate analog and digital ground
planes (reasonably thick traces can be used as an alternative to a
digital ground plane). Connect these ground planes at the ground
pin of the power supply. Run separate traces from the power
supply to the supply pins of the digital and analog circuits. Ideally,
each device has its own power supply trace, but these can be
shared by a number of devices, as long as a single trace is not used
to route current to both digital and analog circuitry.
AGND V
DD
MICROPROCESSOR
AD623
2
3
6
5
7
4
ANALOG POWER SUPPLY
GND–5V+5V
DIGITAL POWER SUPPLY
+5VGND
4
V
IN1
1
V
DD
6
AGND
14
DGND
3
V
IN2
ADC
AD7892-2
0.1µF
0.1µF0.1µF 0.1µF
12
00778-046
Figure 76. Optimal Grounding Practice for a Bipolar Supply Environment with Separate Analog and Digital Supplies
V
DD
AGND
MICROPROCESSOR
AD623
2
3
6
5
7
4
4
V
IN1
1
V
DD
6
AGND
14
DGND
ADC
AD7892-2
0.1µF
0.1µF
0.1µF
12
POWER SUPPLY
+5V GND
00778-047
Figure 77. Optimal Ground Practice in a Single-Supply Environment