Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Functional Block Diagram
- Revision History
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Theory of Operation
- Applications Information
- Evaluation Board
- Outline Dimensions
AD623 Data Sheet
Rev. G | Page 24 of 32
APPLICATIONS INFORMATION
BASIC CONNECTION
Figure 71 and Figure 72 show the basic connection circuits for
the AD623. The +V
S
and −V
S
terminals are connected to the
power supply. The supply can be either bipolar (V
S
= ±2.5 V to
±6 V) or single supply (−V
S
= 0 V, + V
S
= 2.7 V to 12 V).
Capacitively decouple power supplies close to the power pins of
the device. For optimal results, use surface-mount 0.1 µF ceramic
chip capacitors and 10 µF electrolytic tantalum capacitors.
00778-042
R
G
R
G
V
IN
OUTPUT
V
OUT
REF
R
G
REF (INPUT)
+2.5V TO +6V
+V
S
10µF
0.1µF
–2.5V TO –6V
–V
S
10µF
0.1µF
Figure 71. Dual-Supply Basic Connection
00778-055
R
G
R
G
V
IN
OUTPUT
V
OUT
REF
R
G
REF (INPUT)
+3V TO +12V
+V
S
10µF
0.1µF
Figure 72. Single-Supply Basic Connection
The input voltage, which can be either single-ended (tie either
−IN or +IN to ground) or differential, is amplified by the
programmed gain. The output signal appears as the voltage
difference between the OUTPUT pin and the externally applied
voltage on the REF input. For a ground referenced output,
ground REF.
GAIN SELECTION
The gain of the AD623 is programmed by the R
G
resistor, or
more precisely, by whatever impedance appears between Pin 1
and Pin 8. The AD623 offers accurate gains using 0.1% to 1%
tolerance resistors. Table 7 shows the required values of R
G
for
the various gains. Note that for G = 1, the R
G
terminals are
unconnected (R
G
= ∞). For any arbitrary gain, R
G
can be
calculated by
R
G
= 100 kΩ/(G − 1)
Table 7. Required Values of Gain Resistors
Desired
Gain
1% Standard Table
Value of R
G
Calculated Gain Using
1% Resistors
2 100 kΩ 2
5 24.9 kΩ 5.02
10 11 kΩ 10.09
20 5.23 kΩ 20.12
33 3.09 kΩ 33.36
40
2.55 kΩ
40.21
50 2.05 kΩ 49.78
65 1.58 kΩ 64.29
100 1.02 kΩ 99.04
200 499 Ω 201.4
500 200 Ω 501
1000 100 Ω 1001
REFERENCE TERMINAL
The reference terminal potential defines the zero output voltage
and is especially useful when the load does not share a precise
ground with the rest of the system. The reference terminal
provides a direct means of injecting a precise offset to the
output. The reference terminal is also useful when bipolar
signals are being amplified because the terminal can provide a
virtual ground voltage. The voltage on the reference terminal
can vary from −V
S
to +V
S
.
INPUT AND OUTPUT OFFSET VOLTAGE ERROR
The offset voltage (V
OS
) of the AD623 is attributed to two
sources: those originating in the two input stages where the
instrumentation amplifier gain is established, and those
originating in the subtractor output stage. The output error is
divided by the programmed gain when referred to the input. In
practice, the input errors dominate at high gain settings,
whereas the output error prevails when the gain is set at or near
unity.
Calculate the V
OS
error for any given gain as follows:
Total Error Referred to Input (RTI)
= Input Error + (Output Error/G)
Total Error Referred to Output (RTO)
= (Input Error × G) + Output Error
The RTI offset errors and noise voltages for different gains are
listed in Table 8.