Datasheet

Data Sheet AD5781
Rev. D | Page 21 of 28
Table 9. Hardware Control Pins Truth Table
LDAC CLR RESET
Function
X
1
X
1
0 The AD5781 is in reset mode. The device cannot be programmed.
X
1
X
1
The AD5781 is returned to its power-on state. All registers are set to their default values.
0 0 1 The DAC register is loaded with the clearcode register value, and the output is set accordingly.
0 1 1 The output is set according to the DAC register value.
1 0 1 The DAC register is loaded with the clearcode register value, and the output is set accordingly.
1 1 The output is set according to the DAC register value.
0 1 The output remains at the clear code value.
1 1 The output remains set according to the DAC register value.
0 1 The output remains at the clear code value.
1
1
The DAC register is loaded with the clearcode register value and the output is set accordingly.
0 1 The DAC register is loaded with the clearcode register value and the output is set accordingly.
1 1 The output remains at the clear code value.
0 1 The output is set according to the DAC register value.
1
X is don’t care.
ON-CHIP REGISTERS
DAC Register
Table 10 outlines how data is written to and read from the DAC register.
Table 10. DAC Register
MSB LSB
DB23 DB22 DB21 DB20 DB19 DB2 DB1 DB0
R/
W
Register address DAC register data
R/
W
0 0 1 18-bits of data X
1
X
1
1
X is don’t care.
The following equation describes the ideal transfer function of the DAC:
(
)
REFN
REFN
REFP
OUT
V
DV
V
V
+
−
×−
=
12
18
where:
V
REFN
is the negative voltage applied at the V
REFNS
input pin.
V
REFP
is the positive voltage applied at the V
REFPS
input pin.
D is the 18-bit code programmed to the DAC.