Datasheet
Table Of Contents
- Features
- Applications
- General Description
- Revision History
- Functional Block Diagram
- Specifications
- Absolute Maximum Ratings
- Pin Configuration and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Theory of Operation
- Registers
- Design Features
- Applications Information
- Layout Guidelines
- Outline Dimensions

AD5764R Data Sheet
Rev. D | Page 8 of 32
Timing Diagrams
DB23
SCLK
SYNC
SDIN
LDAC
LDAC = 0
CLR
1 2 24
DB0
t
1
VOUTx
VOUTx
VOUTx
t
4
t
6
t
3
t
2
t
5
t
8
t
7
t
10
t
9
t
10
t
11
t
12
t
12
t
17
t
18
t
13
t
14
06064-002
Figure 2. Serial Interface Timing Diagram
LDAC
SDO
SDIN
SYNC
SCLK
24 48
DB23 DB0 DB23 DB0
DB23
INPUT WORD FOR DAC NUNDEFINED
INPUT WORD FOR DAC N – 1INPUT WORD FOR DAC N
DB0
t
1
t
2
t
3
t
4
t
6
t
7
t
8
t
15
t
16
t
5
t
10
t
9
06064-003
Figure 3. Daisy-Chain Timing Diagram