Datasheet

AD5764R Data Sheet
Rev. D | Page 24 of 32
REGISTERS
Table 9. Input Shift Register Format
MSB LSB
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 to DB1 DB0
R/W
0 REG2 REG1 REG0 A2 A1 A0 Data
Table 10. Input Shift Register Bit Function Descriptions
Register Bit Description
R/W
Indicates a read from or a write to the addressed register
REG2, REG1, REG0
Used in association with the address bits, determines if a read or write operation is to the data register, offset register,
gain registers, or function register
REG2 REG1 REG0 Function
0
0
0
Function register
0 1 0 Data register
0 1 1 Coarse gain register
1 0 0 Fine gain register
1 0 1 Offset register
A2, A1, A0 Decodes the DAC channels
A2
A1
A0
Channel Address
0 0 0 DAC A
0
0
1
DAC B
0 1 0 DAC C
0 1 1 DAC D
1 0 0 All DACs
Data Data bits
FUNCTION REGISTER
The function register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine
the function addressed. The functions available via the function register are outlined in Table 11 and Table 12.
Table 11. Function Register Options
REG2 REG1 REG0 A2 A1 A0 DB15 to DB6 DB5 DB4 DB3 DB2 DB1 DB0
0 0 0 0 0 0
NOP, data = don’t care
0 0 0 0 0 1 Don’t care
Local ground
offset adjust
D1
direction
D1
value
D0
direction
D0
value
SDO
disable
0 0 0 1 0 0
Clear, data = don’t care
0 0 0 1 0 1
Load, data = don’t care
Table 12. Explanation of Function Register Options
Option Description
NOP No operation instruction used in readback operations.
Local Ground
Offset Adjust
Set by the user to enable the local ground offset adjust function. Cleared by the user to disable the local ground offset
adjust function (default). See the Design Features section for more information.
D0, D1
Direction
Set by the user to enable the D0 and D1 pins as outputs. Cleared by the user to enable the D0 and D1 pins as inputs (default).
See the Design Features section for more information.
D0, D1 Value
I/O port status bits. Logic values written to these locations determine the logic outputs on the D0 and D1 pins when
configured as outputs. These bits indicate the status of the D0 and D1 pins when the I/O port is active as an input. When
enabled as inputs, these bits are don’t cares during a write operation.
SDO Disable Set by the user to disable the SDO output. Cleared by the user to enable the SDO output (default).
Clear Addressing this function resets the DAC outputs to 0 V in twos complement mode and negative full scale in binary mode.
Load Addressing this function updates the DAC registers and consequently the analog outputs.