Datasheet

AD5757 Data Sheet
Rev. D | Page 30 of 44
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 19 and Table 20.
Table 19. Programming DAC Control Register
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0
1
0
X
1
X
1
X
1
X
1
INT_ENABLE
CLR_EN
OUTEN
RSET
DC_DC
X
1
R2
R1
R0
1
X = don’t care.
Table 20. DAC Control Register Functions
Bit Description
INT_ENABLE Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. Does not enable the output. Can
only be done on a per channel basis. It is recommended to set this bit and allow a >200 µs delay before enabling the
output because this results in a reduced output enable glitch. Plots of this glitch can be found in Figure 25.
CLR_EN Per channel clear enable bit. Selects if this channel clears when the CLEAR pin is activated.
CLR_EN = 1, channel clears when the part is cleared.
CLR_EN = 0, channel does not clear when the part is cleared (default).
OUTEN Enables/disables the selected output channel.
OUTEN = 1, enables the channel.
OUTEN = 0, disables the channel (default).
RSET Selects an internal or external current sense resistor for the selected DAC channel.
RSET = 0, selects the external resistor (default).
RSET = 1, selects the internal resistor.
DC_DC Powers the dc-to-dc converter on the selected channel.
DC_DC = 1, power up the dc-to-dc converter.
DC_DC = 0, power down the dc-to-dc converter (default).
This allows per channel dc-to-dc converter power-up/power-down. To power down the dc-to-dc converter, the OUTEN and
INT_ENABLE bits must also be set to 0.
All dc-to-dc converters can also be powered up simultaneously using the DCDC_ALL bit in the main control register.
R2, R1, R0 Selects the output range to be enabled.
R2 R1 R0 Output Range Selected
1 0 0 4 mA to 20 mA current range
1 0 1 0 mA to 20 mA current range
1 1 0 0 mA to 24 mA current range