Datasheet

AD5755-1 Data Sheet
Rev. E | Page 10 of 52
Timing Diagrams
0
9226-002
MSB
SCLK
SYNC
SDIN
LDAC
LDAC = 0
CLEAR
12 24
LSB
t
1
V
OUT_x
V
OUT_x
V
OUT_x
t
4
t
6
t
3
t
2
t
5
t
8
t
7
t
10
t
9
t
10
t
11
t
12
t
12
t
16
t
17
t
13
RESET
t
18
t
14
t
19
Figure 3. Serial Interface Timing Diagram
09226-003
S
YN
C
MSB MSBLSB LSB
INPUT WORD SPECIFIES
REGISTER TO BE READ
NOP CONDITION
t
6
t
15
SDIN
MSB LSB
UNDEFINED SELECTED REGISTER DATA
CLOCKED OUT
SDO
SCLK
24 24
1 1
Figure 4. Readback Timing Diagram