Datasheet

AD5735 Data Sheet
Rev. C | Page 36 of 48
Software Register
The software register allows the user to perform a software reset of
the part. This register is also used to set the user toggle bit, D11,
in the status register and as part of the watchdog timer feature
when that feature is enabled.
Bit D12 in the software register can be used to ensure that
communication has not been lost between the MCU and the
AD5735 and that the datapath lines are working properly (that
is, SDIN, SCLK, and
SYNC
).
When the watchdog timer feature is enabled, the user must write
0x195 to Bits[D11:D0] of the software register within the timeout
period. If this command is not received within the timeout period,
the ALERT pin signals a fault condition. This command is only
required when the watchdog timer feature is enabled.
DC-to-DC Control Register
The dc-to-dc control register allows the user to configure the
dc-to-dc switching frequency and phase, as well as the maxi-
mum allowable dc-to-dc output voltage. The dc-to-dc control
register options are shown in Table 27 and Table 28.
Table 25. Programming the Software Register
D15 D14 D13 D12 D11 to D0
1 0 0 User program Reset code/SPI code
Table 26. Software Register Bit Descriptions
Bit Name Description
User Program This bit is mapped to Bit D11 of the status register. When this bit is set to 1, Bit D11 of the status register is set to 1.
When this bit is set to 0, Bit D11 of the status register is also set to 0. This feature can be used to ensure that the SPI
pins are working correctly by writing a known bit value to this register and then reading back Bit D11 from the
status register.
Reset Code/SPI Code
Option Description
Reset code Writing 0x555 to Bits[D11:D0] performs a software reset of the AD5735.
SPI code If the watchdog timer feature is enabled, 0x195 must be written to the software register
(Bits[D11:D0]) within the programmed timeout period (see Table 22).
Table 27. Programming the DC-to-DC Control Register
D15 D14 D13 D12 to D7 D6 D5 to D4 D3 to D2 D1 to D0
0 1 1 X
1
DC-DC comp DC-DC phase DC-DC freq DC-DC MaxV
1
X = don’t care.
Table 28. DC-to-DC Control Register Bit Descriptions
Bit Name Description
DC-DC Comp Selects the internal compensation resistor or an external compensation resistor for the dc-to-dc converter. See the
DC-to-DC Converter Compensation Capacitors section and the AI
CC
Supply Requirements—Slewing section.
0 = selects the internal 150 kΩ compensation resistor (default).
1 = bypasses the internal compensation resistor. When this bit is set to 1, an external compensation resistor must
be used; this resistor is placed at the COMP
DCDC_x
pin in series with the 10 nF dc-to-dc compensation capacitor to
ground. Typically, a resistor of ~50 kΩ is recommended.
DC-DC Phase User-programmable dc-to-dc converter phase (between channels).
00 = all dc-to-dc converters clock on the same edge (default).
01 = Channel A and Channel B clock on the same edge; Channel C and Channel D clock on the opposite edge.
10 = Channel A and Channel C clock on the same edge; Channel B and Channel D clock on the opposite edge.
11 = Channel A, Channel B, Channel C, and Channel D clock 90° out of phase from each other.
DC-DC Freq Switching frequency for the dc-to-dc converter; this frequency is divided down from the internal 13 MHz oscillator
(see Figure 67 and Figure 68).
00 = 250 kHz ± 10%.
01 = 410 kHz ± 10% (default).
10 = 650 kHz ± 10%.
DC-DC MaxV Maximum allowed V
BOOST_x
voltage supplied by the dc-to-dc converter.
00 = 23 V + 1 V/−1.5 V (default).
01 = 24.5 V ± 1 V.
10 = 27 V ± 1 V.
11 = 29.5 V ± 1 V.