Datasheet

Data Sheet AD5725
Rev. C | Page 7 of 20
Timing Diagrams
A0/A1
DATA
OUT
t
DZ
t
RCS
t
RDS
t
RDH
t
AS
t
AH
t
CSD
CS
R/W
HIGH-Z HIGH-Z
DATA VALID
0
6442-002
Figure 2. Data Read Timing
A0/A1
DATA IN
t
WCS
t
WS
t
WH
t
AH
t
AS
t
LS
t
WDS
t
WDH
t
LDW
t
RESET
t
LH
R/W
CS
LDAC
RESET
06442-003
Figure 3. Data Write Timing
ADDRESS
10ns
t
WS
t
AS
t
LS
t
WDS
DATA1
VALID
DATA2
VALID
DATA3
VALID
DATA4
VALID
t
WDH
t
LH
t
WH
ADDRESS
TWO
ADDRESS
THREE
DATA IN
LDAC
R/W
CS
ADDRESS
FOUR
ADDRESS
ONE
06442-004
Figure 4. Single Buffer Mode Timing
ADDRESS
10ns
t
WS
t
AS
t
LS
t
WDS
DATA1
VALID
DATA2
VALID
DATA3
VALID
DATA4
VALID
t
WDH
t
LH
t
WH
ADDRESS
TWO
ADDRESS
THREE
t
LDW
DATA IN
LDAC
CS
R/W
ADDRESS
FOUR
ADDRESS
ONE
06442-005
Figure 5. Double Buffer Mode Timing