Datasheet

AD5725 Data Sheet
Rev. C | Page 16 of 20
Table 7. AD5725 Logic Truth Table
A1 A0 R/
W CS CLR LDAC
INPUT REG DAC REG MODE DAC
Low Low Low Low High Low Write Write Transparent A
Low High Low Low High Low Write Write Transparent B
High Low Low Low High Low Write Write Transparent C
High High Low Low High Low Write Write Transparent D
Low Low Low Low High High Write Hold Write Input A
Low High Low Low High High Write Hold Write Input B
High Low Low Low High High Write Hold Write Input C
High High Low Low High High Write Hold Write Input D
Low
Low
High
Low
High
High
Read
Hold
Read Input
A
Low High High Low High High Read Hold Read Input B
High Low High Low High High Read Hold Read Input C
High High High Low High High Read Hold Read Input D
X X X High High Low Hold Update all DAC registers All
X X X High High High Hold Hold Hold All
X X X X Low X All Registers set to mid/zero scale All
X X X High

X All Registers latched to mid/zero scale All