Datasheet

AD5724/AD5734/AD5754 Data Sheet
Rev. F | Page 2 of 31
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
AC Performance Characteristics ................................................ 5
Timing Characteristics ................................................................ 5
Timing Diagrams .......................................................................... 6
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configuration and Function Descriptions ............................. 9
Typical Performance Characteristics ........................................... 10
Terminology .................................................................................... 16
Theory of Operation ...................................................................... 18
Architecture ................................................................................. 18
Power-Up Sequence ................................................................... 18
Serial Interface ............................................................................ 18
Load DAC (
LDAC
)..................................................................... 20
Asynchronous Clear (
CLR
) ....................................................... 20
Configuring the AD5724/AD5734/AD5754 .......................... 20
Transfer Function ....................................................................... 20
Input Shift Register .................................................................... 24
DAC Register .............................................................................. 24
Output Range Select Register ................................................... 25
Control Register ......................................................................... 25
Power Control Register.............................................................. 26
Features ............................................................................................ 27
Analog Output Control ............................................................. 27
Power-Down Mode .................................................................... 27
Overcurrent Protection ............................................................. 27
Thermal Shutdown .................................................................... 27
Applications Information .............................................................. 28
+5 V/±5 V Operation ................................................................ 28
Alternative Power-Up Sequence Support ............................... 28
Layout Guidelines....................................................................... 28
Galvanically Isolated Interface ................................................. 29
Voltage Reference Selection ...................................................... 29
Microprocessor Interfacing ....................................................... 29
Outline Dimensions ....................................................................... 31
Ordering Guide .......................................................................... 31
REVISION HISTORY
2/2017—Rev. E to Rev. F
Added Power-Up Sequence Section ............................................. 18
Changes to Table 7 and Table 8 ..................................................... 21
Changes to Table 10 and Table 11 ................................................ 22
Changes to Table 13 and Table 14 ................................................ 23
Changes to Analog Output Control Section ............................... 27
Added Alternative Power-Up Sequence Support Section,
Figure 43, and Figure 44; Renumbered Sequentially ................. 28
2/2016—Rev. D to Rev. E
Changes to Table 1...................................................................................... 3
Change to Table 5 ......................................................................................... 9
7/2011—Rev. C to Rev. D
Changes to Table 3: t7, t8, t10 Limits ....................................................... 5
3/2011—Rev. B to Rev. C
Changes to Configuring the AD5724/
AD5734/AD5754
Section .............................................................................................. 20
8/2010—Rev. A to Rev. B
Changes to Table 27 ....................................................................... 26
4/2010—Rev. 0 to Rev. A
Changes to Junction Temperature, T
J
max Parameter, Table 4 ... 8
Changes to Exposed Pad Description, Table 5 .............................. 9
Added Exposed Paddle Notation to Outline Dimensions ........ 30
8/2008—Revision 0: Initial Version
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