Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Product Highlights
- Table of Contents
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Theory of Operation
- Digital-to-Analog Converters
- Transfer Function
- DAC Architecture
- Serial Interface
- Standalone Operation
- Write and Update Commands
- Daisy-Chain Operation
- Readback Operation
- Power-Down Operation
- Load DAC (Hardware /LDAC Pin)
- Mask Register
- Hardware Reset (/RESET)
- Reset Select Pin (RSTSEL)
- Internal Reference Setup
- Solder Heat Reflow
- Long-Term Temperature Drift
- Thermal Hysteresis
- Applications Information
- Outline Dimensions

AD5689R/AD5687R Data Sheet
Rev. 0 | Page 26 of 28
APPLICATIONS INFORMATION
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5689R/AD5687R is achieved
via a serial bus using a standard protocol that is compatible with
DSP processors and microcontrollers. The communications
channel requires a 3-wire or 4-wire interface consisting of a
clock signal, a data signal, and a synchronization signal. Each
device requires a 24-bit data-word with data valid on the rising
edge of
SYNC
.
AD5689R/AD5687R TO ADSP-BF531 INTERFACE
The SPI interface of the AD5689R/AD5687R is designed to be
easily connected to industry-standard DSPs and microcontrollers.
Figure 52 shows the AD5689R/AD5687R connected to an Analog
Devices Blackfin® DSP. The Blackfin has an integrated SPI port
that connects directly to the SPI pins of the AD5689R/AD5687R.
Figure 52. ADSP-BF531 Interface to the AD5689R/AD5687R
AD5689R/AD5687R TO SPORT INTERFACE
The Analog Devices ADSP-BF527 has one SPORT serial port.
Figure 53 shows how one SPORT interface can be used to
control the AD5689R/AD5687R.
Figure 53. SPORT Interface to the AD5689R/AD5687R
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful consideration of
the power supply and ground return layout helps to ensure the
rated performance. Design the PCB on which the AD5689R/
AD5687R are mounted so that the AD5689R/AD5687R lie on
the analog plane.
Provide the AD5689R/AD5687R with ample supply bypassing
of 10 µF in parallel with 0.1 µF on each supply, located as close
to the package as possible, ideally right up against the device.
The 10 µF capacitor is of the tantalum bead type. Use a 0.1 µF capa-
citor with low effective series resistance (ESR) and low effective
series inductance (ESI), such as the common ceramic types,
which provide a low impedance path to ground at high frequencies
to handle transient currents due to internal logic switching.
In systems where there are many devices on one board, it is
often useful to provide some heat sinking capability to allow
the power to dissipate easily.
Each AD5689R or AD5687R has an exposed paddle beneath the
device. Connect this paddle to the GND supply for the part. For
optimum performance, use special considerations to design the
motherboard and to mount the package. For enhanced thermal,
electrical, and board level performance, solder the exposed paddle
on the bottom of the package to the corresponding thermal land
paddle on the PCB. Design thermal vias into the PCB land paddle
area to further improve heat dissipation.
The GND plane on the device can be increased (as shown in
Figure 54) to provide a natural heat sinking effect.
Figure 54. Paddle Connection to Board
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
iCoupler® products from Analog Devices provide voltage isolation
in excess of 2.5 kV. The serial loading structure of the AD5689R/
AD5687R m
akes these parts ideal for isolated interfaces because
the number of interface lines is kept to a minimum. Figure 55
shows a 4-channel isolated interface to the AD5689R/AD5687R
using an ADuM1400. For additional information, visit
www.analog.com/icouplers.
Figure 55. Isolated Interface
ADSP-BF531
SYNC
SPISELx
SCLKSCK
SDIN
MOSI
LDAC
PF9
RESETPF8
AD5689R/
AD5687R
11256-053
ADSP-BF527
SYNCSPORT_TFS
SCLKSPORT_TSCK
SDINSPORT_DTO
LDACGPIO0
RESETGPIO1
AD5689R/
AD5687R
11256-054
AD5689R/
AD5687R
GND
PLANE
BOARD
11256-055
ENCODE
SERIAL
CLOCK IN
CONTROLLER
ADuM1400
1
SERIAL
DATA OUT
SYNC OUT
LOAD DAC
OUT
DECODE
TO
SCLK
TO
SDIN
TO
SYNC
TO
LDAC
V
IA
V
OA
ENCODE DECODE
V
IB
V
OB
ENCODE DECODE
V
IC
V
OC
ENCODE DECODE
V
ID
V
OD
1
ADDITIONAL PINS OMITTED FOR CLARITY.
11256-056