Datasheet
Table Of Contents
- Features
- Applications
- Functional Block Diagram
- General Description
- Product Highlights
- Table of Contents
- Specifications
- Absolute Maximum Ratings
- Pin Configurations and Function Descriptions
- Typical Performance Characteristics
- Terminology
- Theory of Operation
- Digital-to-Analog Converters
- Transfer Function
- DAC Architecture
- Serial Interface
- Standalone Operation
- Write and Update Commands
- Daisy-Chain Operation
- Readback Operation
- Power-Down Operation
- Load DAC (Hardware /LDAC Pin)
- Mask Register
- Hardware Reset (/RESET)
- Reset Select Pin (RSTSEL)
- Internal Reference Setup
- Solder Heat Reflow
- Long-Term Temperature Drift
- Thermal Hysteresis
- Applications Information
- Outline Dimensions

AD5689R/AD5687R Data Sheet
Rev. 0 | Page 24 of 28
HARDWARE RESET (
RESET
)
RESET
is an active low reset that allows the outputs to be cleared
to either zero scale or midscale. The clear code value is user
selectable via the power-on reset select pin (RSTSEL).
RESET
must be kept low for a minimum amount of time to complete
the operation (see
Figure 2). When the
RESET
signal is returned
high, the output remains at the cleared value until a new value is
programmed. The outputs cannot be updated with a new value
while the
RESET
pin is low. There is also a software executable
reset function that resets the DAC to the power-on reset code.
Command 0110 is designated for this software reset function
(see
Table 9). Any events on
LDAC
or
RESET
during a power-on
reset are ignored.
RESET SELECT PIN (RSTSEL)
The AD5689R/AD5687R contain a power-on reset circuit that
controls the output voltage during power-up. When the RSTSEL
pin is connected low (to GND), the output powers up to zero
scale. Note that this is outside the linear region of the DAC.
When the RSTSEL pin is connected high (to V
LOGIC
), V
OUT
X
powers up to midscale. The output remains powered up at this
level until a valid write sequence is sent to the DAC.
INTERNAL REFERENCE SETUP
Command 0111 is reserved for setting up the internal reference
(see Table 9). By default, the on-chip reference is on at power-up.
To reduce the supply current, this reference can be turned off by
setting the software-programmable bit, DB0, as shown in Table 17.
Table 16 shows how the state of the bit corresponds to the mode
of operation.
Table 16. Reference Setup Register
Internal Reference
Setup Register (DB0) Action
0 Reference on (default)
1 Reference off
SOLDER HEAT REFLOW
As with all IC reference voltage circuits, the reference value
experiences a shift induced by the soldering process. Analog
Devices, Inc., performs a reliability test, called precondition,
that mimics the effect of soldering a device to a board. The
output voltage specification that is listed in Table 2 includes the
effect of this reliability test.
Figure 49 shows the effect of solder heat reflow (SHR) as
measured through the reliability test (precondition).
Figure 49. SHR Reference Voltage Shift
LONG-TERM TEMPERATURE DRIFT
Figure 50 shows the change in V
REF
value after 1000 hours in life
test at 150°C.
Figure 50. Reference Drift Through to 1000 Hours
Table 17. 24-Bit Input Shift Register Contents for Internal Reference Setup Command
1
DB23
(MSB)
DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 to DB1 DB0 (LSB)
0 1 1 1 X X X X X 1 or 0
Command bits (C3 to C0) Address bits (A3 to A0) Don’t care Reference setup register
1
X = don’t care.
60
0
10
20
30
40
50
2.498 2.499 2.500 2.501 2.502
HITS
V
REF
(V)
POSTSOLDER
HEAT REFLOW
PRESOLDER
HEAT REFLOW
11256-050
60
0
10
20
30
40
50
2.498 2.499 2.500 2.501 2.502
HITS
V
REF
(V)
0 HOUR
168 HOURS
500 HOURS
1000 HOURS
11256-051